Datasheet

KSZ8041TL/FTL/MLL

DS00002436B-page 30  2017 Microchip Technology Inc.

4. Wait (poll) for register 1Dh bit 15 to return a ‘0’, indicating cable diagnostic test is completed.

5. Read cable diagnostic test results in register 1Dh bits [14:13]. The results are as follows:

00 = Valid test, normal condition

01 = Valid test, open circuit in cable

10 = Valid test, short circuit in cable

11 = Invalid test, cable diagnostic test failed

The ‘11’ case, invalid test, occurs if the KSZ8041TL/FTL/MLL is unable to shut down the link partner. In this instance,

the test is not run because it would be impossible for the KSZ8041TL/FTL/MLL to determine if the detected signal is a

reflection of the signal generated by the KSZ8041TL/FTL/MLL, or a signal from its link partner.

6. Get distance to fault by multiplying the decimal value in register 1Dh bits [8:0] by a constant of 0.4. The distance,

D (expressed in meters), to the cable fault is determined by the following formula:

D (distance to cable fault) = 0.4 x {decimal value of register 1Dh bits [8:0]}

The 0.4 constant may be calibrated for different cable types and cabling conditions, including cables with a velocity of

propagation that varies significantly from the norm.

3.19 Power Management

The KSZ8041TL/FTL/MLL offers the following power management modes:

3.19.1 POWER SAVING MODE

This mode is used to reduce power consumption when the cable is unplugged. It is in effect when auto-negotiation mode

is enabled, cable is disconnected, and register 1Fh bit 10 is set to 1. Under power saving mode, the KSZ8041TL/FTL/

MLL shuts down all transceiver blocks, except for transmitter, energy detect and PLL circuits. Additionally, in MII mode,

the RXC clock output is disabled. RXC clock is enabled after the cable is connected and link is established.

Power saving mode is disabled by writing a zero to register 1Fh bit 10.

3.19.2 POWER DOWN MODE

This mode is used to power down the entire KSZ8041TL/FTL/MLL device when it is not in use. Power down mode is

enabled by writing a one to register 0h bit 11. In the power down state, the KSZ8041TL/FTL/MLL disables all internal

functions, except for the MII management interface.

3.20 Reference Clock Connection Options

A crystal or clock source, such as an oscillator, is used to provide the reference clock for the KSZ8041TL/FTL/MLL.

The following figure illustrates how to connect the 25 MHz crystal and oscillator reference clock for MII mode.

For the KSZ8041TL/FTL, the following figure illustrates how to connect the 50 MHz oscillator reference clock for RMII

mode.

FIGURE 3-6: 25 MHZ CRYSTAL/OSCILLATOR REFERENCE CLOCK FOR MII MODE

25MHz OSC

±50ppm

22pF

25MHz XTAL

±50ppm