Datasheet
2017 Microchip Technology Inc. DS00002436B-page 17
KSZ8041TL/FTL/MLL
Note 2-1 P = power supply
GND = ground
I = input
O = output
I/O = bi-directional
40
COL/
CONFIG0
Ipd/O
MII Mode: Collision Detect Output
Config. Mode: The pull-up/pull-down value is latched as CONFIG0 during
power-up/reset. See Table 2-4 for details.
41
CRS/
CONFIG1
Ipd/O
MII Mode: Carrier Sense Output
Config. Mode: The pull-up/pull-down value is latched as CONFIG1 during
power-up/reset. See Table 2-4 for details.
42
LED0/
NWAYEN
Ipu/O
LED Output: Programmable LED0 Output
Config. Mode: Latched as Auto-Negotiation Enable (register 0h, bit 12) during
power-up/reset. See Table 2-4 for details.
The LED0 pin is programmable via register 1Eh bits [15:14], and is defined as
follows:
LED Mode = [00]
Link/Activity Pin State LED Definition
No Link High OFF
Link Low ON
Activity Toggle Blinking
LED Mode = [01]
Link Pin State LED Definition
No Link High OFF
Link Low ON
LED Mode = [10]: Reserved
LED Mode = [11]: Reserved
43
LED1/
SPEED
Ipu/O
LED Output: Programmable LED1 Output
Config. Mode: Latched as SPEED (register 0h, bit 13) during power-up/reset.
See Table 2-4 for details.
The LED1 pin is programmable via register 1Eh bits [15:14], and is defined as
follows:
LED Mode = [00]
Speed Pin State LED Definition
10BT High OFF
100BT Low ON
LED Mode = [01]
Activity Pin State LED Definition
No Activity High OFF
Activity Toggle Blinking
LED Mode = [10]: Reserved
LED Mode = [11]: Reserved
44 NC — No connect
45 NC — No connect
46 NC — No connect
47 RST# I Chip reset (active-low)
48 NC — No connect
TABLE 2-3: SIGNALS FOR KSZ8041MLL (CONTINUED)
Pin
Number
Pin Name
Type
Note 2-1
Description