Datasheet

HV9910C
DS20005323A-page 4  2014 Microchip Technology Inc.
1.0 ELECTRICAL
CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
V
IN
to GND...................................................... -0.5V to +470V
V
DD
to GND.......................................................................12V
CS, LD, PWMD, GATE...........................-0.3V to (V
DD
+ 0.3V)
Junction temperature ....................................-40°C to +125°C
Storage temperature .....................................-65°C to +150°C
Continuous power dissipation (T
A
= +25°C)
8-lead SOIC ...............................................650 mW
16-lead SOIC ...........................................1300 mW
8-lead SOIC with heat slug ......................1300 mW
Note: Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions, above those indicated in the
operational listings of this specification, is not implied. Expo-
sure to maximum rating conditions for extended periods may
affect device reliability.
1.1 ELECTRICAL SPECIFICATIONS
TABLE 1-1: ELECTRICAL CHARACTERISTICS (SHEET 1 OF 2)
1
Symbol Parameter Note Min Typ Max Units Conditions
Input
V
INDC
Input DC supply voltage
range
2
3
15 - 450 V DC input voltage
I
IN(MAX)
Supply current - - 0.8 1.5 mA
Pin PWMD to V
DD
, no capaci-
tance at GATE
I
INSD
Shut-down mode supply
current
- - 0.5 1.0 mA Pin PWMD to GND
Internal Regulator
V
DD
Internally regulated voltage - 7.25 7.50 7.75 V
V
IN
= 15V, I
DD(ext)
= 0,
PWMD = V
DD
, 500pF at GATE;
R
OSC
= 249k
V
DD
, line Line regulation of V
DD
-0-1.0V
V
IN
= 15 - 450V, I
DD(ext)
= 0,
PWMD = V
DD
, 500pF at GATE;
R
OSC
= 249k
V
DD
, load Load regulation of V
DD
-0-0.1V
I
DD(ext)
= 0 - 1.0mA,
PWMD = V
DD
, 500pF at GATE;
ROSC = 249k
UVLO
V
DD
under voltage lockout
threshold
3
6.45 6.70 6.95 V V
DD
rising
UVLO
V
DD
under voltage lockout
hysteresis
--500-mVV
DD
falling
I
IN(MAX)
Maximum regulator current
4
5.0 - - mA V
DD
= UVLO - UVLO
PWM Dimming
V
EN(lo)
PWMD input low voltage
3
--1.0VV
IN
= 15 - 450V
V
EN(hi)
PWMD input high voltage
3
2.4 - - V V
IN
= 15 - 450V
R
EN
Internal pull-down resis-
tance at PWMD
- 50 100 150 k V
PWMD
= 5.0V