Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX DS70000689D-page 92  2013-2014 Microchip Technology Inc.
FIGURE 4-10: PAGED DATA MEMORY SPACE
0x0000
Program Memory
0x0000
0x7FFF
0x7FFF
EDS Page 0x001
0x0000
SFR Registers
0x0FFF
0x1000
Up to 16-Kbyte
0x4FFF
Local Data Space EDS
(DSRPAG<9:0>/DSWPAG<8:0>)
Reserved
(Will produce an
address error trap)
32-Kbyte
EDS Window
0xFFFF
0x5000
Page 0
Program Space
0x00_0000
0x7F_FFFF
(lsw – <15:0>)
0x0000
(DSRPAG = 0x001)
(DSWPAG = 0x001)
EDS Page 0x1FF
(DSRPAG = 0x1FF)
(DSWPAG = 0x1FF)
EDS Page 0x200
(DSRPAG = 0x200)
PSV
Program
Memory
EDS Page 0x2FF
(DSRPAG = 0x2FF)
EDS Page 0x300
(DSRPAG = 0x300)
EDS Page 0x3FF
(DSRPAG = 0x3FF)
0x7FFF
0x0000
0x7FFF
0x0000
0x7FFF
0x0000
0x7FFF
0x0000
0x7FFF
DS_Addr<14:0>
DS_Addr<15:0>
(lsw)
PSV
Program
Memory
(MSB)
Table Address Space
(TBLPAG<7:0>)
Program Memory
0x00_0000
0x7F_FFFF
(MSB – <23:16>)
0x0000
(TBLPAG = 0x00)
0xFFFF
DS_Addr<15:0>
lsw Using
TBLRDL/TBLWTL,
MSB Using
TBLRDH/TBLWTH
0x0000
(TBLPAG = 0x7F)
0xFFFF
lsw Using
TBLRDL/TBLWTL,
MSB Using
TBLRDH/TBLWTH
(Instruction & Data)
No Writes Allowed
No Writes Allowed
No Writes Allowed
No Writes Allowed
RAM
(1)
0x7FFF
0x8000
Note 1: For 128K Flash devices. RAM size and
end location are dependent on the
device; see Section 4.2 “Data
Address Space” for more information.