Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 70 2013-2014 Microchip Technology Inc.
C1RXF11SID 046C SID10 SID9 SID8 SID7 SID6 SID5 SID4 SID3 SID2 SID1 SID0 EXIDE —EID17EID16xxxx
C1RXF11EID 046E EID<15:0> xxxx
C1RXF12SID 0470 SID10 SID9 SID8 SID7 SID6 SID5 SID4 SID3 SID2 SID1 SID0
EXIDE —EID17EID16xxxx
C1RXF12EID 0472 EID<15:0> xxxx
C1RXF13SID 0474 SID10 SID9 SID8 SID7 SID6 SID5 SID4 SID3 SID2 SID1 SID0
EXIDE —EID17EID16xxxx
C1RXF13EID 0476 EID<15:0> xxxx
C1RXF14SID 0478 SID10 SID9 SID8 SID7 SID6 SID5 SID4 SID3 SID2 SID1 SID0
EXIDE —EID17EID16xxxx
C1RXF14EID 047A EID<15:0> xxxx
C1RXF15SID 047C SID10 SID9 SID8 SID7 SID6 SID5 SID4 SID3 SID2 SID1 SID0
EXIDE —EID17EID16xxxx
C1RXF15EID 047E EID<15:0> xxxx
TABLE 4-25: CAN1 REGISTER MAP WHEN WIN (C1CTRL<0>) = 1 FOR dsPIC33EPXXXGM60X/7XX DEVICES
(1)
(CONTINUED)
SFR
Name
Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: These registers are not present on dsPIC33EPXXXGM3XX devices.
TABLE 4-26: CAN2 REGISTER MAP WHEN WIN (C1CTRL<0>) = 0 OR 1 FOR dsPIC33EPXXXGM60X/7XX DEVICES
(1)
SFR
Name
Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
C2CTRL1 0500 CSIDL ABAT CANCKS REQOP2 REQOP1 REQOP0 OPMODE2 OPMODE1 OPMODE0 —CANCAP —WIN
0480
C2CTRL2 0502 DNCNT<4:0>
0000
C2VEC 0504 FILHIT4 FILHIT3 FILHIT2 FILHIT1 FILHIT0 ICODE6 ICODE5 ICODE4 ICODE3 ICODE2 ICODE1 ICODE0
0040
C2FCTRL 0506 DMABS2 DMABS1 DMABS0 FSA4 FSA3 FSA2 FSA1 FSA0
0000
C2FIFO 0508 FBP5 FBP4 FBP3 FBP2 FBP1 FBP0 FNRB5 FNRB4 FNRB3 FNRB2 FNRB1 FNRB0
0000
C2INTF 050A TXBO TXBP RXBP TXWAR RXWAR EWARN IVRIF WAKIF ERRIF FIFOIF RBOVIF RBIF TBIF
0000
C2INTE 050C IVRIE WAKIE ERRIE FIFOIE RBOVIE RBIE TBIE
0000
C2EC 050E TERRCNT7 TERRCNT6 TERRCNT5 TERRCNT4 TERRCNT3 TERRCNT2 TERRCNT1 TERRCNT0 RERRCNT7 RERRCNT6 RERRCNT5 RERRCNT4 RERRCNT3 RERRCNT2 RERRCNT1 RERRCNT0
0000
C2CFG1 0510 SJW1 SJW0 BRP5 BRP4 BRP3 BRP2 BRP1 BRP0
0000
C2CFG2 0512 WAKFIL SEG2PH2 SEG2PH1 SEG2PH0 SEG2PHTS SAM SEG1PH2 SEG1PH1 SEG1PH0 PRSEG2 PRSEG1 PRSEG0
0000
C2FEN1 0514 FLTEN<15:0>
FFFF
C2FMSKSEL1 0518 F7MSK1 F7MSK0 F6MSK1 F6MSK0 F5MSK1 F5MSK0 F4MSK1 F4MSK0 F3MSK1 F3MSK0 F2MSK1 F2MSK0 F1MSK1 F1MSK0 F0MSK1 F0MSK0
0000
C2FMSKSEL2 051A F15MSK1 F15MSK0 F14MSK1 F14MSK0 F13MSK1 F13MSK0 F12MSK1 F12MSK0 F11MSK1 F11MSK0 F10MSK1 F10MSK0 F9MSK1 F9MSK0 F8MSK1 F8MSK0
0000
Legend:
— = unimplemented, read as
0
’. Reset values are shown in hexadecimal.
Note 1:
These registers are not present on dsPIC33EPXXXGM3XX devices.