Datasheet
dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 66 2013-2014 Microchip Technology Inc.
TABLE 4-22: ADC1 AND ADC2 REGISTER MAP
SFR
Name
Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
ADC1BUF0 0300 ADC1 Data Buffer 0
xxxx
ADC1BUF1 0302 ADC1 Data Buffer 1
xxxx
ADC1BUF2 0304 ADC1 Data Buffer 2
xxxx
ADC1BUF3 0306 ADC1 Data Buffer 3
xxxx
ADC1BUF4 0308 ADC1 Data Buffer 4
xxxx
ADC1BUF5 030A ADC1 Data Buffer 5
xxxx
ADC1BUF6 030C ADC1 Data Buffer 6
xxxx
ADC1BUF7 030E ADC1 Data Buffer 7
xxxx
ADC1BUF8 0310 ADC1 Data Buffer 8
xxxx
ADC1BUF9 0312 ADC1 Data Buffer 9
xxxx
ADC1BUFA 0314 ADC1 Data Buffer 10
xxxx
ADC1BUFB 0316 ADC1 Data Buffer 11
xxxx
ADC1BUFC 0318 ADC1 Data Buffer 12
xxxx
ADC1BUFD 031A ADC1 Data Buffer 13
xxxx
ADC1BUFE 031C ADC1 Data Buffer 14
xxxx
ADC1BUFF 031E ADC1 Data Buffer 15
xxxx
AD1CON1 0320 ADON — ADSIDL ADDMABM — AD12B FORM1 FORM0 SSRC2 SSRC1 SSRC0 SSRCG SIMSAM ASAM SAMP DONE
0000
AD1CON2 0322 VCFG2 VCFG1 VCFG0 OFFCAL — CSCNA CHPS1 CHPS0 BUFS SMPI4 SMPI3 SMPI2 SMPI1 SMPI0 BUFM ALTS
0000
AD1CON3 0324 ADRC — — SAMC4 SAMC3 SAMC2 SAMC1 SAMC0 ADCS7 ADCS6 ADCS5 ADCS4 ADCS3 ADCS2 ADCS1 ADCS0
0000
AD1CHS123 0326 — — — CH123SB2 CH123SB1 CH123NB1 CH123NB0 CH123SB0 — — — CH123SA2 CH123SA1 CH123NA1 CH123NA0 CH123SA0
0000
AD1CHS0 0328 CH0NB — CH0SB5 CH0SB4 CH0SB3 CH0SB2 CH0SB1 CH0SB0 CH0NA — CH0SA5 CH0SA4 CH0SA3 CH0SA2 CH0SA1 CH0SA0
0000
AD1CSSH 032E CSS<31:16>
0000
AD1CSSL 0330 CSS<15:0>
0000
AD1CON4 0332 — — — — — — — ADDMAEN — — — — — DMABL2 DMABL1 DMABL0
0000
ADC2BUF0 0340 ADC2 Data Buffer 0
xxxx
ADC2BUF1 0342 ADC2 Data Buffer 1
xxxx
ADC2BUF2 0344 ADC2 Data Buffer 2
xxxx
ADC2BUF3 0346 ADC2 Data Buffer 3
xxxx
ADC2BUF4 0348 ADC2 Data Buffer 4
xxxx
ADC2BUF5 034A ADC2 Data Buffer 5
xxxx
ADC2BUF6 034C ADC2 Data Buffer 6
xxxx
ADC2BUF7 034E ADC2 Data Buffer 7
xxxx
ADC2BUF8 0350 ADC2 Data Buffer 8
xxxx
Legend:
x
= unknown value on Reset; — = unimplemented, read as ‘
0
’. Reset values are shown in hexadecimal.
Note 1:
Bits 13 and bit 5 are reserved in the AD2CHS0 register, unlike the AD1CHS0 register.