Datasheet

 2013-2014 Microchip Technology Inc. DS70000689D-page 65

dsPIC33EPXXXGM3XX/6XX/7XX

TABLE 4-21: DCI REGISTER MAP

SFR

Name

Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

DCICON1 0280 DCIEN

r DCISIDL r DLOOP CSCKD CSCKE COFSD UNFM CSDOM DJST r r r COFSM1 COFSM0 0000

DCICON2 0282

r r r rBLEN1BLEN0r COFSG3 COFSG2 COFSG1 COFSG0 r WS3 WS2 WS1 WS0 0000

DCICON3 0284

r r r rBCG<11:0>0000

DCISTAT 0286

r r r r SLOT3 SLOT2 SLOT1 SLOT0 r r r r ROV RFUL TUNF TMPTY 0000

TSCON 0288 TSE<15:0> 0000

RSCON 028C RSE<15:0> 0000

RXBUF0 0290 Receive 0 Data Register uuuu

RXBUF1 0292 Receive 1 Data Register uuuu

RXBUF2 0294 Receive 2 Data Register uuuu

RXBUF3 0296 Receive 3 Data Register uuuu

TXBUF0 0298 Transmit 0 Data Register 0000

TXBUF1 029A Transmit 1 Data Register 0000

TXBUF2 029C Transmit 2 Data Register 0000

TXBUF3 029E Transmit 3 Data Register 0000

Legend: u = unchanged; r = reserved; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.