Datasheet

ManualsBrandsMicrochip ManualsEmbedded Processors & ControllersMicrocontroller 8 Bit TQFP-44

 2013-2014 Microchip Technology Inc. DS70000689D-page 59

dsPIC33EPXXXGM3XX/6XX/7XX

TABLE 4-12: PWM GENERATOR 4 REGISTER MAP

SFR

Name

Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

PWMCON4 0C80 FLTSTAT CLSTAT TRGSTAT FLTIEN CLIEN TRGIEN ITB MDCS DTC1 DTC0 DTCP — MTBS CAM XPRES IUE

0000

IOCON4 0C82 PENH PENL POLH POLL PMOD1 PMOD0 OVRENH OVRENL OVRDAT1 OVRDAT0 FLTDAT1 FLTDAT0 CLDAT1 CLDAT0 SWAP OSYNC

C000

FCLCON4 0C84 IFLTMOD CLSRC4 CLSRC3 CLSRC2 CLSRC1 CLSRC0 CLPOL CLMOD FLTSRC4 FLTSRC3 FLTSRC2 FLTSRC1 FLTSRC0 FLTPOL FLTMOD1 FLTMOD0

00F8

PDC4 0C86 PDC3<15:0>

0000

PHASE4 0C88 PHASE3<15:0>

0000

DTR4 0C8A — — DTR3<13:0>

0000

ALTDTR4 0C8C — — ALTDTR3<13:0>

0000

SDC4 0C8E SDC4<15:0>

0000

SPHASE4 0C90 SPHASE4<15:0>

0000

TRIG4 0C92 TRGCMP<15:0>

0000

TRGCON4 0C94 TRGDIV3 TRGDIV2 TRGDIV1 TRGDIV0 — — — — — — TRGSTRT5 TRGSTRT4 TRGSTRT3 TRGSTRT2 TRGSTRT1 TRGSTRT0

0000

PWMCAP4 0C98 PWMCAP4<15:0>

0000

LEBCON4 0C9A PHR PHF PLR PLF FLTLEBEN CLLEBEN — — — — BCH BCL BPHH BPHL BPLH BPLL

0000

LEBDLY4 0C9C — — — — LEB<11:0>

0000

AUXCON4 0C9E — — — — BLANKSEL3 BLANKSEL2 BLANKSEL1 BLANKSEL0 — — CHOPSEL3 CHOPSEL2 CHOPSEL1 CHOPSEL0 CHOPHEN CHOPLEN

0000

Legend:

— = unimplemented, read as ‘

’. Reset values are shown in hexadecimal.

TABLE 4-13: PWM GENERATOR 5 REGISTER MAP

SFR

Name

Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

PWMCON5 0CA0 FLTSTAT CLSTAT TRGSTAT FLTIEN CLIEN TRGIEN ITB MDCS DTC1 DTC0 DTCP — MTBS CAM XPRES IUE

0000

IOCON5 0CA5 PENH PENL POLH POLL PMOD1 PMOD0 OVRENH OVRENL OVRDAT1 OVRDAT0 FLTDAT1 FLTDAT0 CLDAT1 CLDAT0 SWAP OSYNC

C000

FCLCON5 0CA4 IFLTMOD CLSRC4 CLSRC3 CLSRC2 CLSRC1 CLSRC0 CLPOL CLMOD FLTSRC4 FLTSRC3 FLTSRC2 FLTSRC1 FLTSRC0 FLTPOL FLTMOD1 FLTMOD0

00F8

PDC5 0CA6 PDC5<15:0>

0000

PHASE5 0CA8 PHASE5<15:0>

0000

DTR5 0CAA — — DTR5<13:0>

0000

ALTDTR5 0CAC — — ALTDTR5<13:0>

0000

SDC5 0CAE SDC5<15:0>

0000

SPHASE5 0CB0 SPHASE5<15:0>

0000

TRIG5 0CB2 TRGCMP<15:0>

0000

TRGCON5 0CB4 TRGDIV3 TRGDIV2 TRGDIV1 TRGDIV0 — — — — — — TRGSTRT5 TRGSTRT4 TRGSTRT3 TRGSTRT2 TRGSTRT1 TRGSTRT0

0000

PWMCAP5 0CB8 PWMCAP5<15:0>

0000

LEBCON5 0CBA PHR PHF PLR PLF FLTLEBEN CLLEBEN — — — — BCH BCL BPHH BPHL BPLH BPLL

0000

LEBDLY5 0CBC — — — — LEB<11:0>

0000

AUXCON5 0CBE — — — — BLANKSEL3 BLANKSEL2 BLANKSEL1 BLANKSEL0 — — CHOPSEL3 CHOPSEL2 CHOPSEL1 CHOPSEL0 CHOPHEN CHOPLEN

0000

Legend:

— = unimplemented, read as ‘

’. Reset values are shown in hexadecimal.