Datasheet

 2013-2014 Microchip Technology Inc. DS70000689D-page 535
dsPIC33EPXXXGM3XX/6XX/7XX
Resets............................................................................... 111
Brown-out Reset (BOR)............................................ 111
Configuration Mismatch Reset (CM)......................... 111
Illegal Condition Reset (IOPUWR)............................ 111
Illegal Address Mode ........................................ 111
Illegal Opcode................................................... 111
Security............................................................. 111
Uninitialized W Register.................................... 111
Master Clear Pin Reset (MCLR
) ............................... 111
Master Reset Signal (SYSRST
)................................ 111
Power-on Reset (POR)............................................. 111
RESET Instruction (SWR)......................................... 111
Trap Conflict Reset (TRAPR).................................... 111
Watchdog Timer Time-out Reset (WDTO)................ 111
Revision History ................................................................ 527
RTCC
Control Registers ...................................................... 386
Resources................................................................. 385
Writing to the Timer................................................... 385
S
Serial Peripheral Interface (SPI) ....................................... 273
Special Features of the CPU ............................................ 411
SPI
Control Registers ...................................................... 276
Helpful Tips............................................................... 275
Symbols Used in Opcode Descriptions............................. 420
T
Temperature and Voltage Specifications
AC ............................................................................. 503
Timer
Control Registers ...................................................... 216
Timer1............................................................................... 211
Control Register........................................................ 212
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 213
Timing Diagrams
10-Bit ADC1 Conversion (CHPS<1:0> = 01,
SIMSAM = 0, ASAM = 0, SSRC<2:0> = 000,
SSRCG = 0)...................................................... 496
10-Bit ADC1 Conversion (CHPS<1:0> = 01,
SIMSAM = 0, ASAM = 1, SSRC<2:0> = 111,
SSRCG = 0, SAMC<4:0> = 00010) .................. 496
12-Bit ADC1 Conversion (ASAM = 0,
SSRC<2:0> = 000, SSRCG = 0) ...................... 494
BOR and Master Clear Reset ................................... 448
CANx I/O................................................................... 487
External Clock........................................................... 446
High-Speed PWMx ................................................... 455
High-Speed PWMx Fault .......................................... 455
I/O Characteristics .................................................... 448
I2Cx Bus Data (Master Mode) .................................. 483
I2Cx Bus Data (Slave Mode) .................................... 485
I2Cx Bus Start/Stop Bits (Master Mode) ................... 483
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 485
Input Capture x (ICx)................................................. 453
Load Conditions ........................................................ 490
OCx/PWMx ............................................................... 454
Output Compare x (OCx).......................................... 454
Power-on Reset Characteristics ............................... 449
QEAx/QEBx Input..................................................... 457
QEIx Index Pulse...................................................... 458
SPI1 Master Mode (Full-Duplex, CKE = 0,
CKP = x, SMP = 1) ........................................... 474
SPI1 Master Mode (Full-Duplex, CKE = 1,
CKP = x, SMP = 1) ........................................... 473
SPI1 Master Mode (Half-Duplex, Transmit Only,
CKE = 0) ........................................................... 471
SPI1 Master Mode (Half-Duplex, Transmit Only,
CKE = 1) ........................................................... 472
SPI1 Slave Mode (Full-Duplex, CKE = 0,
CKP = 0, SMP = 0)........................................... 481
SPI1 Slave Mode (Full-Duplex, CKE = 0,
CKP = 1, SMP = 0)........................................... 479
SPI1 Slave Mode (Full-Duplex, CKE = 1,
CKP = 0, SMP = 0)........................................... 475
SPI1 Slave Mode (Full-Duplex, CKE = 1,
CKP = 1, SMP = 0)........................................... 477
SPI2, SPI3 Master Mode (Full-Duplex,
CKE = 0, CKP = x, SMP = 1)............................ 462
SPI2, SPI3 Master Mode (Full-Duplex,
CKE = 1, CKP = x, SMP = 1)............................ 461
SPI2, SPI3 Master Mode (Half-Duplex,
Transmit Only, CKE = 0) .................................. 459
SPI2, SPI3 Master Mode (Half-Duplex,
Transmit Only, CKE = 1) .................................. 460
SPI2, SPI3 Slave Mode (Full-Duplex,
CKE = 0, CKP = 0, SMP = 0) ........................... 469
SPI2, SPI3 Slave Mode (Full-Duplex,
CKE = 0, CKP = 1, SMP = 0) ........................... 467
SPI2, SPI3 Slave Mode (Full-Duplex,
CKE = 1, CKP = 0, SMP = 0) ........................... 463
SPI2, SPI3 Slave Mode (Full-Duplex,
CKE = 1, CKP = 1, SMP = 0) ........................... 465
Timer1-Timer5 External Clock .................................. 451
TimerQ (QEIx Module) External Clock ..................... 456
UARTx I/O ................................................................ 487
Timing Specifications
I2Cx Bus Data Requirements (Master Mode)........... 484
I2Cx Bus Data Requirements (Slave Mode)............. 486
U
UART
Control Registers ...................................................... 291
Helpful Tips............................................................... 290
Universal Asynchronous Receiver
Transmitter (UART) .................................................. 289
User ID Words .................................................................. 416
V
Voltage Regulator (On-Chip) ............................................ 416
W
Watchdog Timer (WDT)............................................ 411, 417
Programming Considerations ................................... 417
WWW Address ................................................................. 536
WWW, On-Line Support ..................................................... 12