Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 532  2013-2014 Microchip Technology Inc.
Program Address Space..................................................... 37
Memory Map for
dsPIC33EP128GM3XX/6XX/7XX Devices ......... 37
Memory Map for
dsPIC33EP256GM3XX/6XX/7XX Devices ......... 38
Memory Map for
dsPIC33EP512GM3XX/6XX/7XX Devices ......... 39
Program Memory
Organization................................................................ 40
Reset Vector ............................................................... 40
Program Space
Address Construction................................................101
Data Access from Program Memory Using
Table Instructions.............................................. 102
Table Read Instructions
TBLRDH............................................................ 102
TBLRDL ............................................................ 102
Programmable CRC
Control Registers ...................................................... 407
Overview ...................................................................406
Setup Examples........................................................406
Programmable Cyclic Redundancy Check (CRC)
Generator.................................................................. 405
PTG
Control Registers ...................................................... 351
Introduction ............................................................... 349
Output Descriptions .................................................. 364
Step Commands and Format .................................... 361
Q
Quadrature Encoder Interface (QEI) ................................. 257
Control Registers ...................................................... 259
R
Real-Time Clock and Calender (RTCC)............................ 383
Referenced Sources ........................................................... 13
Register
PTGADJ (PTG Adjust) .............................................. 359
PTGL0 (PTG Literal 0) .............................................. 359
PTGQPTR (PTG Step Queue Pointer) ..................... 360
PTGQUEx (PTG Step Queue x) ............................... 360
Register Maps
ADC1 and ADC2......................................................... 66
CAN1 (When WIN (C1CTRL) = 0 or 1) ....................... 68
CAN1 (When WIN (C1CTRL) = 0) .............................. 68
CAN1 (When WIN (C1CTRL) = 1) .............................. 69
CAN2 (When WIN (C1CTRL) = 0 or 1) ....................... 70
CAN2 (When WIN (C1CTRL) = 0) .............................. 71
CAN2 (When WIN (C1CTRL) = 1) .............................. 72
Configuration Byte .................................................... 412
CPU Core.................................................................... 46
CTMU.......................................................................... 82
DCI.............................................................................. 65
DMA Controller ........................................................... 83
I2C1 and I2C2............................................................. 63
Input Capture 1-8 ........................................................ 53
Interrupt Controller
(dsPIC33EPXXXGM3XX Devices) ..................... 50
Interrupt Controller
(dsPIC33EPXXXGM6XX/7XX Devices).............. 48
JTAG Interface............................................................82
NVM ............................................................................ 78
Op Amp/Comparator...................................................81
Output Compare ......................................................... 54
Pad Configuration .......................................................89
Parallel Master/Slave Port .......................................... 79
Peripheral Pin Select Input
(dsPIC33EPGM60X/7XX Devices)..................... 76
Peripheral Pin Select Input
(dsPIC33EPXXXGM3XX Devices) ..................... 77
Peripheral Pin Select Output
(dsPIC33EPXXXGM304/604 Devices)............... 74
Peripheral Pin Select Output
(dsPIC33EPXXXGM306/706 Devices)............... 74
Peripheral Pin Select Output
(dsPIC33EPXXXGM310/710 Devices)............... 75
PMD (dsPIC33EPXXXGM3XX Devices) .................... 80
PMD (dsPIC33EPXXXGM6XX/7XX Devices) ............ 79
PORTA (dsPIC33EPXXXGM304/604 Devices).......... 84
PORTA (dsPIC33EPXXXGM306/706 Devices).......... 84
PORTA (dsPIC33EPXXXGM310/710 Devices).......... 84
PORTB (dsPIC33EPXXXGM304/604 Devices).......... 85
PORTB (dsPIC33EPXXXGM306/706 Devices).......... 85
PORTB (dsPIC33EPXXXGM310/710 Devices).......... 85
PORTC (dsPIC33EPXXXGM304/604 Devices) ......... 86
PORTC (dsPIC33EPXXXGM306/706 Devices) ......... 86
PORTC (dsPIC33EPXXXGM310/710 Devices) ......... 86
PORTD (dsPIC33EPXXXGM306/706 Devices) ......... 87
PORTD (dsPIC33EPXXXGM310/710 Devices) ......... 87
PORTE (dsPIC33EPXXXGM306/706 Devices).......... 88
PORTE (dsPIC33EPXXXGM310/710 Devices).......... 87
PORTF (dsPIC33EPXXXGM306/706 Devices).......... 88
PORTF (dsPIC33EPXXXGM310/710 Devices).......... 88
PORTG (dsPIC33EPXXXGM306/706 Devices) ......... 89
PORTG (dsPIC33EPXXXGM310/710 Devices) ......... 89
Programmable CRC ................................................... 73
PTG ............................................................................ 56
PWM ........................................................................... 57
PWM Generator 1....................................................... 57
PWM Generator 2....................................................... 58
PWM Generator 3....................................................... 58
PWM Generator 4....................................................... 59
PWM Generator 5....................................................... 59
PWM Generator 6....................................................... 60
QEI1 ........................................................................... 61
QEI2 ........................................................................... 62
Real-Time Clock and Calendar................................... 82
Reference Clock ......................................................... 78
SPI1, SPI2 and SPI3 .................................................. 64
System Control ........................................................... 78
Timers......................................................................... 52
UART1 and UART2 .................................................... 63
UART3 and UART4 .................................................... 64
Registers
ADxCHS0 (ADCx Input Channel 0 Select) ............... 338
ADxCHS123 (ADCx Input
Channel 1, 2, 3 Select) ..................................... 337
ADxCON1 (ADCx Control 1)..................................... 331
ADxCON2 (ADCx Control 2)..................................... 333
ADxCON3 (ADCx Control 3)..................................... 335
ADxCON4 (ADCx Control 4)..................................... 336
ADxCSSH (ADCx Input Scan Select High)............... 340
ADxCSSL (ADCx Input Scan Select Low)................ 342
ALCFGRPT (Alarm Configuration) ........................... 388
ALRMVAL (Alarm Minutes and Seconds Value,
ALRMPTR = 00) ............................................... 393
ALRMVAL (Alarm Month and Day Value,
ALRMPTR = 10) ............................................... 391
ALRMVAL (Alarm Weekday and Hours Value,
ALRMPTR = 01) ............................................... 392
ALTDTRx (PWMx Alternate Dead-Time).................. 246