Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 52 2013-2014 Microchip Technology Inc.
TABLE 4-4: TIMERS REGISTER MAP
SFR
Name
Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
TMR1 0100 Timer1 Register 0000
PR1 0102 Period Register 1 FFFF
T1CON 0104 TON
—TSIDL TGATE TCKPS1 TCKPS0 TSYNC TCS 0000
TMR2 0106 Timer2 Register 0000
TMR3HLD 0108 Timer3 Holding Register (For 32-bit timer operations only) xxxx
TMR3 010A Timer3 Register 0000
PR2 010C Period Register 2 FFFF
PR3 010E Period Register 3 FFFF
T2CON 0110 TON
—TSIDL TGATE TCKPS1 TCKPS0 T32 —TCS 0000
T3CON 0112 TON
—TSIDL TGATE TCKPS1 TCKPS0 —TCS 0000
TMR4 0114 Timer4 Register 0000
TMR5HLD 0116 Timer5 Holding Register (For 32-bit timer operations only) xxxx
TMR5 0118 Timer5 Register 0000
PR4 011A Period Register 4 FFFF
PR5 011C Period Register 5 FFFF
T4CON 011E TON
—TSIDL TGATE TCKPS1 TCKPS0 T32 —TCS 0000
T5CON 0120 TON
—TSIDL TGATE TCKPS1 TCKPS0 —TCS 0000
TMR6 0122 Timer6 Register 0000
TMR7HLD 0124 Timer7 Holding Register (For 32-bit timer operations only) xxxx
TMR7 0126 Timer7 Register 0000
PR6 0128 Period Register 6 FFFF
PR7 012A Period Register 7 FFFF
T6CON 012C TON
—TSIDL TGATE TCKPS1 TCKPS0 T32 —TCS 0000
T7CON 012E TON
—TSIDL TGATE TCKPS1 TCKPS0 —TCS 0000
TMR8 0130 Timer8 Register 0000
TMR9HLD 0132 Timer9 Holding Register (For 32-bit timer operations only) xxxx
TMR9 0134 Timer9 Register 0000
PR8 0136 Period Register 8 FFFF
PR9 0138 Period Register 9 FFFF
T8CON 013A TON
—TSIDL TGATE TCKPS1 TCKPS0 T32 —TCS 0000
T9CON 013C TON
—TSIDL TGATE TCKPS1 TCKPS0 —TCS 0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.