Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 472  2013-2014 Microchip Technology Inc.
FIGURE 33-24: SPI1 MASTER MODE (HALF-DUPLEX, TRANSMIT ONLY, CKE = 1)
TIMING CHARACTERISTICS
TABLE 33-41: SPI1 MASTER MODE (HALF-DUPLEX, TRANSMIT ONLY) TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  TA  +85°C for Industrial
-40°C  T
A  +125°C for Extended
Param. Symbol Characteristic
(1)
Min. Typ.
(2)
Max. Units Conditions
SP10 FscP Maximum SCK1 Frequency — — 25 MHz (Note 3)
SP20 TscF SCK1 Output Fall Time — — — ns See Parameter DO32
(Note 4)
SP21 TscR SCK1 Output Rise Time — — — ns See Parameter DO31
(Note 4)
SP30 TdoF SDO1 Data Output Fall Time — — — ns See Parameter DO32
(Note 4)
SP31 TdoR SDO1 Data Output Rise Time — — — ns See Parameter DO31
(Note 4)
SP35 TscH2doV,
TscL2doV
SDO1 Data Output Valid after
SCK1 Edge
—620ns
SP36 TdiV2scH,
TdiV2scL
SDO1 Data Output Setup to
First SCK1 Edge
20 — — ns
Note 1: These parameters are characterized, but are not tested in manufacturing.
2: Data in “Typical” column is at 3.3V, +25°C unless otherwise stated.
3: The minimum clock period for SCK1 is 66.7 ns. Therefore, the clock generated in Master mode must not
violate this specification.
4: Assumes 50 pF load on all SPI1 pins.
SCK1
(CKP = 0)
SCK1
(CKP = 1)
SDO1
SP21
SP20
SP35
SP20
SP21
MSb LSb
Bit 14 - - - - - -1
SP30, SP31
Note: Refer to Figure 33-1 for load conditions.
SP36
SP10