Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 414  2013-2014 Microchip Technology Inc.
WDTPRE Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
WDTPOST<3:0> Watchdog Timer Postscaler bits
1111 = 1:32,768
1110 = 1:16,384
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0001 = 1:2
0000 = 1:1
WDTWIN<1:0> Watchdog Timer Window Select bits
11 = WDT Window is 25% of WDT Period
10 = WDT Window is 37.5% of WDT Period
01 = WDT Window is 50% of WDT Period
00 = WDT Window is 75% of WDT Period
ALTI2C1 Alternate I2C1 Pins bit
1 = I2C1 is mapped to the SDA1/SCL1 pins
0 = I2C1 is mapped to the ASDA1/ASCL1 pins
ALTI2C2 Alternate I2C2 Pins bit
1 = I2C2 is mapped to the SDA2/SCL2 pins
0 = I2C2 is mapped to the ASDA2/ASCL2 pins
BOREN Brown-out Reset (BOR) Detection Enable bit
1 = BOR is enabled
0 = BOR is disabled
JTAGEN JTAG Enable bit
1 = JTAG is enabled
0 = JTAG is disabled
ICS<1:0> ICD Communication Channel Select bits
11 = Communicates on PGEC1 and PGED1
10 = Communicates on PGEC2 and PGED2
01 = Communicates on PGEC3 and PGED3
00 = Reserved, do not use
TABLE 30-2: CONFIGURATION BITS DESCRIPTION (CONTINUED)
Bit Field Description
Note 1: The Two-Speed Start-up is not enabled when EC mode is used since the EC clocks will be ready immediately.