Datasheet

 2013-2014 Microchip Technology Inc. DS70000689D-page 413
dsPIC33EPXXXGM3XX/6XX/7XX
TABLE 30-2: CONFIGURATION BITS DESCRIPTION
Bit Field Description
GCP General Segment Code-Protect bit
1 = User program memory is not code-protected
0 = Code protection is enabled for the entire program memory space
GWRP General Segment Write-Protect bit
1 = User program memory is not write-protected
0 = User program memory is write-protected
IESO Two-Speed Oscillator Start-up Enable bit
(1)
1 = Starts up device with FRC, then automatically switches to the user-selected oscillator
source when ready
0 = Starts up device with user-selected oscillator source
PWMLOCK PWM Lock Enable bit
1 = Certain PWM registers may only be written after a key sequence
0 = PWM registers may be written without a key sequence
FNOSC<2:0> Oscillator Selection bits
111 = Fast RC Oscillator with Divide-by-N (FRCDIVN)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Divide-by-N with PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
FCKSM<1:0> Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
IOL1WAY Peripheral Pin Select Configuration bit
1 = Allows only one reconfiguration
0 = Allows multiple reconfigurations
OSCIOFNC OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is the clock output
0 = OSC2 is the general purpose digital I/O pin
POSCMD<1:0> Primary Oscillator Mode Select bits
11 = Primary Oscillator mode is disabled
10 = HS Crystal Oscillator mode
01 = XT Crystal Oscillator mode
00 = EC (External Clock) mode
FWDTEN Watchdog Timer Enable bit
1 = Watchdog Timer is always enabled (LPRC oscillator cannot be disabled. Clearing the
SWDTEN bit in the RCON register will have no effect.)
0 = Watchdog Timer is enabled/disabled by user software (LPRC can be disabled by
clearing the SWDTEN bit in the RCON register.)
WINDIS Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
PLLKEN PLL Lock Enable bit
1 = PLL lock is enabled
0 = PLL lock is disabled
Note 1: The Two-Speed Start-up is not enabled when EC mode is used since the EC clocks will be ready immediately.