Datasheet

 2013-2014 Microchip Technology Inc. DS70000689D-page 405
dsPIC33EPXXXGM3XX/6XX/7XX
29.0 PROGRAMMABLE CYCLIC
REDUNDANCY CHECK (CRC)
GENERATOR
The programmable CRC generator offers the following
features:
• User-Programmable (up to 32nd order)
polynomial CRC equation
• Interrupt Output
• Data FIFO
The programmable CRC generator provides a
hardware-implemented method of quickly generating
checksums for various networking and security
applications. It offers the following features:
• User-programmable CRC polynomial equation,
up to 32 bits
• Programmable shift direction (little or big-endian)
• Independent data and polynomial lengths
• Configurable interrupt output
• Data FIFO
A simplified block diagram of the CRC generator is
shown in Figure 29-1. A simple version of the CRC shift
engine is shown in Figure 29-2.
FIGURE 29-1: CRC BLOCK DIAGRAM
Note 1: This data sheet summarizes the features
of the dsPIC33EPXXXGM3XX/6XX/7XX
family of devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to the “dsPIC33/PIC24 Family Refer-
ence Manual”, “32-Bit Programmable
Cyclic Redundancy Check (CRC)”
(DS70346), which is available from the
Microchip web site (www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
CRCDATH CRCDATL
CRCWDATH CRCWDATL
LENDIAN
10
CRCISEL
1
0
FIFO Empty Event
Shift Complete Event
Set CRCIF
2 * FP Shift Clock
Variable FIFO
(4x32, 8x16 or 16x8)
Shift Buffer
CRC Shift Engine