Datasheet

 2013-2014 Microchip Technology Inc. DS70000689D-page 401
dsPIC33EPXXXGM3XX/6XX/7XX
REGISTER 28-4: PMAEN: PARALLEL MASTER PORT ADDRESS ENABLE REGISTER
(1)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTEN15 PTEN14 PTEN<13:8>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTEN<7:2> PTEN<1:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at Reset ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 PTEN15: PMCS2 Strobe Enable bit
1 = PMA15 functions as either PMA<15> or PMCS2
0 = PMA15 functions as port I/O
bit 14 PTEN14: PMCS1 Strobe Enable bit
1 = PMA14 functions as either PMA<14> or PMCS1
0 = PMA14 functions as port I/O
bit 13-2 PTEN<13:2>: PMP Address Port Enable bits
1 = PMA<13:2> function as PMP address lines
0 = PMA<13:2> function as port I/Os
bit 1-0 PTEN<1:0>: PMALH/PMALL Strobe Enable bits
1 = PMA1 and PMA0 function as either PMA<1:0> or PMALH and PMALL
0 = PMA1 and PMA0 function as port I/Os
Note 1: This register is not available on 44-pin devices.