Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 400  2013-2014 Microchip Technology Inc.
REGISTER 28-3: PMADDR: PARALLEL MASTER PORT ADDRESS REGISTER
(MASTER MODES ONLY)
(1,2)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CS2 CS1 ADDR13 ADDR12 ADDR11 ADDR10 ADDR9 ADDR8
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at Reset ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CS2: Chip Select 2 bit
If PMCON<7:6> =
10 or 01:
1 = Chip Select 2 is active
0 = Chip Select 2 is inactive
If PMCON<7:6> =
11 or 00:
Bit functions as ADDR15.
bit 14 CS1: Chip Select 1 bit
If PMCON<7:6> = 10:
1 = Chip Select 1 is active
0 = Chip Select 1 is inactive
If PMCON<7:6> =
11 or 0x:
Bit functions as ADDR14.
bit 13-0 ADDR<13:0>: Destination Address bits
Note 1: In Enhanced Slave mode, PMADDR functions as PMDOUT1, one of the two Data Buffer registers.
2: This register is not available on 44-pin devices.