Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 378  2013-2014 Microchip Technology Inc.
bit 3 ABEN: AND Gate B Input Enable bit
1 = MBI is connected to the AND gate
0 = MBI is not connected to the AND gate
bit 2 ABNEN: AND Gate B Input Inverted Enable bit
1 = Inverted MBI is connected to the AND gate
0 = Inverted MBI is not connected to the AND gate
bit 1 AAEN: AND Gate A Input Enable bit
1 = MAI is connected to the AND gate
0 = MAI is not connected to the AND gate
bit 0 AANEN: AND Gate A Input Inverted Enable bit
1 = Inverted MAI is connected to the AND gate
0 = Inverted MAI is not connected to the AND gate
REGISTER 26-5: CMxMSKCON: COMPARATOR x MASK GATING CONTROL
REGISTER
(CONTINUED)