Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 370  2013-2014 Microchip Technology Inc.
26.3 Op Amp/Comparator Control
Registers
REGISTER 26-1: CMSTAT: OP AMP/COMPARATOR STATUS REGISTER
R/W-0 U-0 U-0 R-0 R-0 R-0 R-0 R-0
PSIDL — —C5EVT
(1)
C4EVT
(1)
C3EVT
(1)
C2EVT
(1)
C1EVT
(1)
bit 15 bit 8
U-0 U-0 U-0 R-0 R-0 R-0 R-0 R-0
— — —C5OUT
(2)
C4OUT
(2)
C3OUT
(2)
C2OUT
(2)
C1OUT
(2)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 PSIDL: Op Amp/Comparator Stop in Idle Mode bit
1 = Discontinues operation of all op amps/comparators when device enters Idle mode
0 = Continues operation of all op amps/comparators in Idle mode
bit 14-13 Unimplemented: Read as ‘0’
bit 12 C5EVT:C1EVT: Op Amp/Comparator 1-5 Event Status bit
(1)
1 = Op amp/comparator event occurred
0 = Op amp/comparator event did not occur
bit 7-5 Unimplemented: Read as ‘0’
bit 4-0 C5OUT:C1OUT: Op Amp/Comparator 1-5 Output Status bit
(2)
When CPOL = 0:
1 = VIN+ > VIN-
0 = V
IN+ < VIN-
When CPOL = 1:
1 = VIN+ < VIN-
0 = V
IN+ > VIN-
Note 1: Reflects the value of the of the CEVT bit in the respective Op Amp/Comparator x Control register,
CMxCON<9>.
2: Reflects the value of the COUT bit in the respective Op Amp/Comparator x Control register, CMxCON<8>.