Datasheet

 2013-2014 Microchip Technology Inc. DS70000689D-page 347
dsPIC33EPXXXGM3XX/6XX/7XX
REGISTER 24-4: DCISTAT: DCI STATUS REGISTER
r-0 r-0 r-0 r-0 R-0 R-0 R-0 R-0
r r r r SLOT3 SLOT2 SLOT1 SLOT0
bit 15 bit 8
r-0 r-0 r-0 r-0 R-0 R-0 R-0 R-0
r r r r ROV RFUL TUNF TMPTY
bit 7 bit 0
Legend: r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-12 Reserved: Read as ‘0’
bit 11-8 SLOT<3:0>: DCI Slot Status bits
1111 = Slot 15 is currently active
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0010 = Slot 2 is currently active
0001 = Slot 1 is currently active
0000 = Slot 0 is currently active
bit 7-4 Reserved: Read as ‘0’
bit 3 ROV: Receive Overflow Status bit
1 = A receive overflow has occurred for at least one Receive register
0 = A receive overflow has not occurred
bit 2 RFUL: Receive Buffer Full Status bit
1 = New data is available in the Receive registers
0 = The Receive registers have old data
bit 1 TUNF: Transmit Buffer Underflow Status bit
1 = A transmit underflow has occurred for at least one Transmit register
0 = A transmit underflow has not occurred
bit 0 TMPTY: Transmit Buffer Empty Status bit
1 = The Transmit registers are empty
0 = The Transmit registers are not empty