Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX

DS70000689D-page 34  2013-2014 Microchip Technology Inc.

bit 3 IPL3: CPU Interrupt Priority Level Status bit 3

(2)

1 = CPU Interrupt Priority Level is greater than 7

0 = CPU Interrupt Priority Level is 7 or less

bit 2 SFA: Stack Frame Active Status bit

1 = Stack frame is active; W14 and W15 address 0x0000 to 0xFFFF, regardless of DSRPAG and

DSWPAG values

0 = Stack frame is not active; W14 and W15 address of EDS or Base Data Space

bit 1 RND: Rounding Mode Select bit

1 = Biased (conventional) rounding is enabled

0 = Unbiased (convergent) rounding is enabled

bit 0 IF: Integer or Fractional Multiplier Mode Select bit

1 = Integer mode is enabled for DSP multiply

0 = Fractional mode is enabled for DSP multiply

(3)

(CONTINUED)

Note 1: This bit is always read as ‘0’.

2: The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU Interrupt Priority Level.

3: Refer to the “dsPIC33/PIC24 Family Reference Manual”, “CPU” (DS70359) for more detailed information.