Datasheet
2013-2014 Microchip Technology Inc. DS70000689D-page 327
dsPIC33EPXXXGM3XX/6XX/7XX
23.0 10-BIT/12-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC)
The dsPIC33EPXXXGM3XX/6XX/7XX devices have
two ADC modules: ADC1 and ADC2. The ADC1
supports up to 49 analog input channels, while the
ADC2 supports up to 32 analog input channels.
On ADCx, the AD12B bit (ADxCON1<10>) allows each
of the ADC modules to be configured by the user as
either a 10-bit, 4 Sample-and-Hold (S&H) ADC (default
configuration) or a 12-bit, 1 S&H ADC. Both ADC1 and
ADC2 can be operated in 12-bit mode.
23.1 Key Features
23.1.1 10-BIT ADCx CONFIGURATION
The 10-bit ADCx configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 49 analog input pins
• Connections to three internal op amps
• Connections to the Charge Time Measurement Unit
(CTMU) and temperature measurement diode
• Channel selection and triggering can be controlled
by the Peripheral Trigger Generator (PTG)
• External voltage reference input pins
• Simultaneous sampling of:
- Up to four analog input pins
- Three op amp outputs
• Combinations of analog inputs and op amp outputs
• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Four result alignment options (signed/unsigned,
fractional/integer)
• Operation during CPU Sleep and Idle modes
23.1.2 12-BIT ADCx CONFIGURATION
The 12-bit ADCx configuration supports all the features
listed above, with the exception of the following:
• In the 12-bit configuration, conversion speeds of
up to 500 ksps are supported
• There is only one S&H amplifier in the 12-bit
configuration; therefore, simultaneous sampling
of multiple channels is not supported.
• Analog inputs, AN32-AN49, are not supported
The ADC1 has up to 49 analog inputs. The analog
inputs, AN32 through AN49, are multiplexed, thus
providing flexibility in using any of these analog inputs in
addition to the analog inputs, AN0 through AN31. Since
AN32 through AN49 are multiplexed, do not use two
channels simultaneously, since it may result in
erroneous output from the module. These analog inputs
are shared with op amp inputs and outputs, comparator
inputs and external voltage references. When op amp/
comparator functionality is enabled, or an external volt-
age reference is used, the analog input that shares that
pin is no longer available. The actual number of analog
input pins, op amps and external voltage reference input
configuration, depends on the specific device.
A block diagram of the ADCx module is shown in
Figure 23-1. Figure 23-2 provides a diagram of the
ADCx conversion clock period.
Note 1: This data sheet summarizes the features
of the dsPIC33EPXXXGM3XX/6XX/7XX
family of devices. It is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to the “dsPIC33/PIC24 Family
Reference Manual”, “Analog-to-Digital
Converter (ADC)” (DS70621), which is
available from the Microchip web site
(www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
Note: The ADCx module needs to be disabled
before modifying the AD12B bit.