Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 322  2013-2014 Microchip Technology Inc.
FIGURE 22-1: CTMU BLOCK DIAGRAM
CTED1
CTED2
Current Source
Edge
Control
Logic
CTMUCON1 or CTMUCON2
Pulse
Generator
CTMUI to ADCx
CMP1
Timer1
OC1
Current
Control
ITRIM<5:0>
IRNG<1:0>
CTMUICON
CTMU
Control
Logic
EDG1STAT
EDG2STAT
Analog-to-Digital
CTPLS
IC1
CMP1
C1IN1-
CDelay
CTMU TEMP
CTMU
Temperature
Sensor
Current Control Selection TGEN EDG1STAT, EDG2STAT
CTMU TEMP 0 EDG1STAT = EDG2STAT
CTMUI to ADCx 0 EDG1STAT  EDG2STAT
CTMUP 1 EDG1STAT  EDG2STAT
No Connect 1 EDG1STAT = EDG2STAT
Trigger
TGEN
CTMUP
External Capacitor
for Pulse Generation