Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 290  2013-2014 Microchip Technology Inc.
20.1 UART Helpful Tips
1. In multi-node direct connect UART networks,
UART receive inputs react to the complementary
logic level defined by the URXINV bit
(UxMODE<4>), which defines the Idle state, the
default of which is logic high (i.e., URXINV = 0).
Because remote devices do not initialize at the
same time, it is likely that one of the devices,
because the RX line is floating, will trigger a Start
bit detection and will cause the first byte received,
after the device has been initialized, to be invalid.
To avoid this situation, the user should use a pull-
up or pull-down resistor on the RX pin, depending
on the value of the URXINV bit.
a) If URXINV = 0, use a pull-up resistor on the
RX pin.
b) If URXINV = 1, use a pull-down resistor on
the RX pin.
2. The first character received on wake-up from
Sleep mode, caused by activity on the UxRX pin
of the UART module, will be invalid. In Sleep
mode, peripheral clocks are disabled. By the
time the oscillator system has restarted and
stabilized from Sleep mode, the baud rate bit
sampling clock, relative to the incoming UxRX
bit timing, is no longer synchronized, resulting in
the first character being invalid. This is to be
expected.