Datasheet

2013-2014 Microchip Technology Inc. DS70000689D-page 273
dsPIC33EPXXXGM3XX/6XX/7XX
18.0 SERIAL PERIPHERAL
INTERFACE (SPI)
The SPI module is a synchronous serial interface,
useful for communicating with other peripheral or
microcontroller devices. These peripheral devices can
be serial EEPROMs, shift registers, display drivers,
A/D Converters, etc. The SPI module is compatible
with the Motorola
®
SPI and SIOP interfaces.
The dsPIC33EPXXXGM3XX/6XX/7XX device family
offers three SPI modules on a single device. These
modules, which are designated as SPI1, SPI2 and
SPI3, are functionally identical. Each SPI module
includes an eight-word FIFO buffer and allows DMA
bus connections. When using the SPI module with
DMA, FIFO operation can be disabled.
The SPI1 module uses dedicated pins which allow for
a higher speed when using SPI1. The SPI2 and SPI3
modules take advantage of the Peripheral Pin Select
(PPS) feature to allow for greater flexibility in pin
configuration of these modules, but results in a lower
maximum speed. See Section 33.0 “Electrical
Characteristics” for more information.
The SPIx serial interface consists of four pins, as
follows:
SDIx: Serial Data Input
SDOx: Serial Data Output
SCKx: Shift Clock Input or Output
SSx
/FSYNCx: Active-Low Slave Select or Frame
Synchronization I/O Pulse
The SPIx module can be configured to operate with
two, three or four pins. In 3-pin mode, SSx
is not used.
In 2-pin mode, neither SDOx nor SSx
is used.
Figure 18-1 illustrates the block diagram of the SPIx
module in Standard and Enhanced modes.
Note 1: This data sheet summarizes the features
of the dsPIC33EPXXXGM3XX/6XX/7XX
family of devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to the “dsPIC33/PIC24 Family
Reference Manual”, “Serial Peripheral
Interface (SPI)” (DS70005185), which is
available from the Microchip web site
(www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
Note: In this section, the SPI modules are
referred to together as SPIx, or separately
as SPI1, SPI2 and SPI3. Special Function
Registers follow a similar notation. For
example, SPIxCON refers to the control
register for the SPI1, SPI2 and SPI3
modules.