Datasheet

 2013-2014 Microchip Technology Inc. DS70000689D-page 241
dsPIC33EPXXXGM3XX/6XX/7XX
REGISTER 16-9: CHOP: PWMx CHOP CLOCK GENERATOR REGISTER
R/W-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
CHPCLKEN
— — — — — CHOPCLK9 CHOPCLK8
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CHOPCLK7 CHOPCLK6 CHOPCLK5 CHOPCLK4 CHOPCLK3 CHOPCLK2 CHOPCLK1 CHOPCLK0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CHPCLKEN: Enable Chop Clock Generator bit
1 = Chop clock generator is enabled
0 = Chop clock generator is disabled
bit 14-10 Unimplemented: Read as ‘0’
bit 9-0 CHOPCLK<9:0>: Chop Clock Divider bits
The frequency of the chop clock signal is given by the following expression:
Chop Frequency = (F
P/PCLKDIV<2:0>)/(CHOP<9:0> + 1)
REGISTER 16-10: MDC: PWMx MASTER DUTY CYCLE REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
MDC<15:8>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
MDC<7:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 MDC<15:0>: PWMx Master Duty Cycle Value bits