Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 232  2013-2014 Microchip Technology Inc.
FIGURE 16-2: HIGH-SPEED PWMx MODULE REGISTER INTERCONNECTION DIAGRAM
MUX
PTMRx
PDCx
PWMCONx
TRGCONx
PTCON, PTCON2
IOCONx
DTRx
PWMxL
PWMxH
FLT1
PWM1L
PWM1H
FCLCONx
PHASEx
LEBCONx
MUX
STMRx
SDCx
SPHASEx
ALTDTRx
PWMCAPx
User Override Logic
Current-Limit
PWM Output Mode
Control Logic
Fault and
Current-Limit
Logic
PWM Generator 1
FLTx
PWM Generator 2-PWM Generator 6
Interrupt
Logic
ADCx Trigger
Module Control and Timing
Duty Cycle Register
Synchronization
Synchronization
Master PeriodMaster Period
Master Duty CycleMaster Duty Cycle
Secondary PWM
SYNCI1
SYNCO1
SEVTCMP
Comparator
Special Event Trigger
Special Event
Postscaler
PTPER
PMTMR
Primary Master Time Base
Master Time Base Counter
Special Event Compare Trigger
Clock
Prescaler
Comparator
Comparator
Comparator
16-Bit Data Bus
TRIGx
Fault Override Logic
Override Logic
SYNCO2
SEVTCMP
Comparator
Special Event Trigger
Special Event
Postscaler
PTPER
PMTMR
Secondary Master Time Base
Master Time Base Counter
Special Event Compare Trigger
Comparator
Clock
Prescaler
DTCMPx
DTCMP1
FOSC
MDC
Dead-Time
Logic
Pin
Control
Logic
Comparator