Datasheet
2013-2014 Microchip Technology Inc. DS70000689D-page 231
dsPIC33EPXXXGM3XX/6XX/7XX
FIGURE 16-1: HIGH-SPEED PWMx MODULE ARCHITECTURAL OVERVIEW
CPU
SYNCI1
SYNCO1
PWM1H
PWM1L
PWM1 Interrupt
PWM2H-PWM5H
PWM2L-PWM5L
PWM2-PWM5
PWM6H
PWM6L
PWM6 Interrupt
Synchronization Signal
Data Bus
ADCx Module
FLT1-FLT8, FLT32
Synchronization Signal
Synchronization Signal
Primary Trigger
Primary Special
DTCMP1-DTCMP6
Fault, Current-Limit and
Dead-Time Compensation
Event Trigger
Fault, Current-Limit
Fault, Current-Limit
FOSC
Interrupt
and Dead-Time Compensation
and Dead-Time Compensation
Master Time Base
PWM
Generator 1
PWM
Generator 2
through
Generator 5
PWM
Generator 6