Datasheet

 2013-2014 Microchip Technology Inc. DS70000689D-page 191
dsPIC33EPXXXGM3XX/6XX/7XX
REGISTER 11-18: RPINR24: PERIPHERAL PIN SELECT INPUT REGISTER 24
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— CSCK2R<6:0>
bit 15 bit 8
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— CSDIR<6:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-8
CSCK2R <6:0>: Assign DCI Clock Input (CSCK) to the Corresponding RPn Pin bits
(see Table 11-2 for input pin selection numbers)
1111100 = Input tied to RPI124
•
•
•
0000001 = Input tied to CMP1
0000000 = Input tied to V
SS
bit 7 Unimplemented: Read as ‘0’
bit 6-0 CSDIR <6:0>: Assign DCI Data Input (CSDI) to the Corresponding RPn Pin bits
(see Table 11-2 for input pin selection numbers)
1111100 = Input tied to RPI124
•
•
•
0000001 = Input tied to CMP1
0000000 = Input tied to V
SS