Datasheet

 2013-2014 Microchip Technology Inc. DS70000689D-page 171
dsPIC33EPXXXGM3XX/6XX/7XX
11.4.5 OUTPUT MAPPING
In contrast to inputs, the outputs of the Peripheral Pin
Select options are mapped on the basis of the pin. In
this case, a control register associated with a particular
pin dictates the peripheral output to be mapped. The
RPORx registers are used to control output mapping.
Like the RPINRx registers, each register contains sets
of 6-bit fields, with each set associated with one RPn
pin (see Register 11-30 through Register 11-42). The
value of the bit field corresponds to one of the periph-
erals and that peripheral’s output is mapped to the pin
(see Table 11-3 and Figure 11-3).
A null output is associated with the output register
Reset value of ‘0’. This is done to ensure that remap-
pable outputs remain disconnected from all output pins
by default.
FIGURE 11-3: MULTIPLEXING REMAPPABLE
OUTPUT FOR RPn
11.4.5.1 Mapping Limitations
The control schema of the peripheral select pins is not
limited to a small range of fixed peripheral configura-
tions. There are no mutual or hardware-enforced
lockouts between any of the peripheral mapping SFRs.
Literally any combination of peripheral mappings
across any or all of the RPn pins is possible. This
includes both many-to-one and one-to-many mappings
of peripheral inputs and outputs to pins. While such
mappings may be technically possible from a configu-
ration point of view, they may not be supportable from
an electrical point of view.
RPnR<5:0>
0
49
1
Default
U1TX Output
SDO2 Output
2
REFCLKO Output
48
QEI1CCMP Output
Output Data
RPn