Datasheet

dsPIC33EPXXXGM3XX/6XX/7XX
DS70000689D-page 104  2013-2014 Microchip Technology Inc.
5.2 RTSP Operation
RTSP allows the user application to erase a single
page of memory, program a row and to program two
instruction words at a time. See Tab le 1 in the
“dsPIC33EPXXXGM3XX/6XX/7XX Product Family”
section for the page sizes of each device.
The Flash program memory array is organized into
rows of 64 instructions or 192 bytes. RTSP allows the
user application to erase a page of program memory,
which consists of eight rows (512 instructions) at a
time, and to program one row or two adjacent words at
a time. The 8-row erase pages and single row write
rows are edge-aligned, from the beginning of program
memory, on boundaries of 1536 bytes and 192 bytes,
respectively.
For more information on erasing and programming Flash
memory, refer to the “dsPIC33/PIC24 Family Reference
Manual”, “Flash Programming” (DS70609).
5.3 Programming Operations
A complete programming sequence is necessary for pro-
gramming or erasing the internal Flash in RTSP mode.
The processor stalls (waits) until the programming
operation is finished.
For erase and program times, refer to Parameters D137a
and D137b (Page Erase Time), and D138a and
D138b (Word Write Cycle Time), in Table 33-13.
Setting the WR bit (NVMCON<15>) starts the opera-
tion and the WR bit is automatically cleared when the
operation is finished.
5.3.1 PROGRAMMING ALGORITHM FOR
FLASH PROGRAM MEMORY
Programmers can program two adjacent words
(24 bits x 2) of program Flash memory at a time on
every other word address boundary (0x000002,
0x000006, 0x00000A, etc.). To do this, it is necessary
to erase the page that contains the desired address of
the location the user wants to change. Programmers
can also program a row of data (64 instruction words/
192 bytes) at a time using the row programming feature
present in these devices. For row programming, the
source data is fetched directly from the data memory
(RAM) on these devices. Two new registers have been
provided to point to the RAM location where the source
data resides. The page that has the row to be pro-
grammed must first be erased before the programming
operation.
For protection against accidental operations, the write
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
application must wait for the programming time until
programming is complete. The two instructions follow-
ing the start of the programming sequence should be
NOPs.
Refer to the “dsPIC33/PIC24 Family Reference Man-
ual”, “Flash Programming” (DS70609) for details and
code examples on programming using RTSP.
5.4 Control Registers
Six SFRs are used to read and write the program Flash
memory: NVMCON, NVMKEY, NVMADR, NVMADRU,
NVMSRCADRL and NVMSRCADRH.
The NVMCON register (Register 5-1) controls which
blocks are to be erased, which memory type is to be
programmed and the start of the programming cycle.
NVMKEY (Register 5-4) is a write-only register that is
used for write protection. To start a programming or
erase sequence, the user application must
consecutively write 0x55 and 0xAA to the NVMKEY
register.
There are two NVM Address registers: NVMADRU and
NVMADR. These two registers, when concatenated,
form the 24-bit Effective Address (EA) of the selected
word for programming operations, or the selected page
for erase operations.
The NVMADRU register is used to hold the upper 8 bits
of the EA, while the NVMADR register is used to hold
the lower 16 bits of the EA.
The NVMSRCADRH and NVMSRCADRL registers are
used to hold the source address of the data in the data
memory that needs to be written to Flash memory.