Datasheet

2018 Microchip Technology Inc. Data Sheet Complete DS40002059A-page 56
ATxmega32E5/16E5/8E5
27. CRC – Cyclic Redundancy Check Generator
27.1 Features
Cyclic redundancy check (CRC) generation and checking for
Communication data
Program or data in flash memory
Data in SRAM and I/O memory space
Integrated with flash memory, EDMA controller, and CPU
Continuous CRC on data going through an EDMA channel
Automatic CRC of the complete or a selectable range of the flash memory
CPU can load data to the CRC generator through the I/O interface
CRC polynomial software selectable to:
CRC-16 (CRC-CCITT)
CRC-32 (IEEE 802.3)
Zero remainder detection
27.2 Overview
A cyclic redundancy check (CRC) is an error detection technique test algorithm used to find accidental errors in data, and it
is commonly used to determine the correctness of a data transmission, and data present in the data and program memo-
ries. A CRC takes a data stream or a block of data as input and generates a 16- or 32-bit output that can be appended to
the data and used as a checksum. When the same data are later received or read, the device or application repeats the
calculation. If the new CRC result does not match the one calculated earlier, the block contains a data error. The applica-
tion will then detect this and may take a corrective action, such as requesting the data to be sent again or simply not using
the incorrect data.
Typically, an n-bit CRC applied to a data block of arbitrary length will detect any single error burst not longer than n bits
(any single alteration that spans no more than n bits of the data), and will detect the fraction 1-2
-n
of all longer error bursts.
The CRC module in XMEGA devices supports two commonly used CRC polynomials; CRC-16 (CRC-CCITT) and CRC-32
(IEEE 802.3).
CRC-16:
Polynomial: x
16
+ x
12
+ x
5
+ 1
Hex Value: 0x1021
CRC-32:
Polynomial: x
32
+ x
26
+ x
23
+ x
22
+ x
16
+ x
12
+ x
11
+ x
10
+ x
8
+ x
7
+ x
5
+ x
4
+ x
2
+ x + 1
Hex Value: 0x04C11DB7