Datasheet

 2018 Microchip Technology Inc. Data Sheet Complete DS40002059A-page 144
ATxmega32E5/16E5/8E5
Issue: TWI SM bus level one Master or slave remembering data
If a write is made to Data register, prior to Address register, the TWI design sends the data as soon as the write to
Address register is made. But the send data will be always 0x00.
Workaround:
Since single interrupt line is shared by both timeout interrupt and other TWI interrupt sources, there is a possibility in
software that data register will be written after timeout is detected but before timeout interrupt routine is executed. To
avoid this, in software, before writing data register, always ensure that timeout status flag is not set.
Issue: Temperature sensor not calibrated
Temperature sensor factory calibration is not implemented on devices before date code 1324.
Workaround:
None.
Issue: Automatic port override on PORT C
When Waveform generation is enabled on PORT C Timers, Automatic port override of peripherals other than Tc may
not work even though the pin is not used as waveform output pin.
Workaround:
No workaround.
Issue: Sext timer is not implemented in slave mode
In slave mode, only Ttout timer is implemented. Sext timer is needed in slave mode to release the SCL line and to
allow the master to send a STOP condition. If only master implements Sext timer, slave continues to stretch the SCL
line (up to the Ttout timeout in the worse case).
Sext = Slave cumulative timeout.
Workaround:
No workaround.