Datasheet
Table Of Contents
- Features
- 1. Ordering Information
- 2. Pinout/Block Diagram
- 3. Overview
- 4. Resources
- 5. Capacitive touch sensing
- 6. AVR CPU
- 7. Memories
- 8. DMAC – Direct Memory Access Controller
- 9. Event System
- 10. System Clock and Clock options
- 10.1 Features
- 10.2 Overview
- 10.3 Clock Sources
- 10.3.1 32kHz Ultra Low Power Internal Oscillator
- 10.3.2 32.768kHz Calibrated Internal Oscillator
- 10.3.3 32.768kHz Crystal Oscillator
- 10.3.4 0.4 - 16MHz Crystal Oscillator
- 10.3.5 2MHz Run-time Calibrated Internal Oscillator
- 10.3.6 32MHz Run-time Calibrated Internal Oscillator
- 10.3.7 External Clock Sources
- 10.3.8 PLL with 1x-31x Multiplication Factor
- 11. Power Management and Sleep Modes
- 12. System Control and Reset
- 13. WDT – Watchdog Timer
- 14. Interrupts and Programmable Multilevel Interrupt Controller
- 15. I/O Ports
- 16. TC0/1 – 16-bit Timer/Counter Type 0 and 1
- 17. TC2 - Timer/Counter Type 2
- 18. AWeX – Advanced Waveform Extension
- 19. Hi-Res – High Resolution Extension
- 20. RTC – 16-bit Real-Time Counter
- 21. USB – Universal Serial Bus Interface
- 22. TWI – Two-Wire Interface
- 23. SPI – Serial Peripheral Interface
- 24. USART
- 25. IRCOM – IR Communication Module
- 26. AES and DES Crypto Engine
- 27. CRC – Cyclic Redundancy Check Generator
- 28. ADC – 12-bit Analog to Digital Converter
- 29. DAC – 12-bit Digital to Analog Converter
- 30. AC – Analog Comparator
- 31. Programming and Debugging
- 32. Pinout and Pin Functions
- 33. Peripheral Module Address Map
- 34. Instruction Set Summary
- 35. Packaging information
- 36. Electrical Characteristics
- 36.1 ATxmega16A4U
- 36.1.1 Absolute Maximum Ratings
- 36.1.2 General Operating Ratings
- 36.1.3 Current consumption
- 36.1.4 Wake-up time from sleep modes
- 36.1.5 I/O Pin Characteristics
- 36.1.6 ADC characteristics
- 36.1.7 DAC Characteristics
- 36.1.8 Analog Comparator Characteristics
- 36.1.9 Bandgap and Internal 1.0V Reference Characteristics
- 36.1.10 Brownout Detection Characteristics
- 36.1.11 External Reset Characteristics
- 36.1.12 Power-on Reset Characteristics
- 36.1.13 Flash and EEPROM Memory Characteristics
- 36.1.14 Clock and Oscillator Characteristics
- 36.1.14.1 Calibrated 32.768kHz Internal Oscillator characteristics
- 36.1.14.2 Calibrated 2MHz RC Internal Oscillator characteristics
- 36.1.14.3 Calibrated and tunable 32MHz internal oscillator characteristics
- 36.1.14.4 32kHz Internal ULP Oscillator characteristics
- 36.1.14.5 Internal Phase Locked Loop (PLL) characteristics
- 36.1.14.6 External clock characteristics
- 36.1.14.7 External 16MHz crystal oscillator and XOSC characteristic
- 36.1.14.8 External 32.768kHz crystal oscillator and TOSC characteristics
- 36.1.15 SPI Characteristics
- 36.1.16 Two-Wire Interface Characteristics
- 36.2 ATxmega32A4U
- 36.2.1 Absolute Maximum Ratings
- 36.2.2 General Operating Ratings
- 36.2.3 Current consumption
- 36.2.4 Wake-up time from sleep modes
- 36.2.5 I/O Pin Characteristics
- 36.2.6 ADC characteristics
- 36.2.7 DAC Characteristics
- 36.2.8 Analog Comparator Characteristics
- 36.2.9 Bandgap and Internal 1.0V Reference Characteristics
- 36.2.10 Brownout Detection Characteristics
- 36.2.11 External Reset Characteristics
- 36.2.12 Power-on Reset Characteristics
- 36.2.13 Flash and EEPROM Memory Characteristics
- 36.2.14 Clock and Oscillator Characteristics
- 36.2.14.1 Calibrated 32.768kHz Internal Oscillator characteristics
- 36.2.14.2 Calibrated 2MHz RC Internal Oscillator characteristics
- 36.2.14.3 Calibrated and tunable 32MHz internal oscillator characteristics
- 36.2.14.4 32kHz Internal ULP Oscillator characteristics
- 36.2.14.5 Internal Phase Locked Loop (PLL) characteristics
- 36.2.14.6 External clock characteristics
- 36.2.14.7 External 16MHz crystal oscillator and XOSC characteristic
- 36.2.14.8 External 32.768kHz crystal oscillator and TOSC characteristics
- 36.2.15 SPI Characteristics
- 36.2.16 Two-Wire Interface Characteristics
- 36.3 ATxmega64A4U
- 36.3.1 Absolute Maximum Ratings
- 36.3.2 General Operating Ratings
- 36.3.3 Current consumption
- 36.3.4 Wake-up time from sleep modes
- 36.3.5 I/O Pin Characteristics
- 36.3.6 ADC characteristics
- 36.3.7 DAC Characteristics
- 36.3.8 Analog Comparator Characteristics
- 36.3.9 Bandgap and Internal 1.0V Reference Characteristics
- 36.3.10 Brownout Detection Characteristics
- 36.3.11 External Reset Characteristics
- 36.3.12 Power-on Reset Characteristics
- 36.3.13 Flash and EEPROM Memory Characteristics
- 36.3.14 Clock and Oscillator Characteristics
- 36.3.14.1 Calibrated 32.768kHz Internal Oscillator characteristics
- 36.3.14.2 Calibrated 2MHz RC Internal Oscillator characteristics
- 36.3.14.3 Calibrated and tunable 32MHz internal oscillator characteristics
- 36.3.14.4 32kHz Internal ULP Oscillator characteristics
- 36.3.14.5 Internal Phase Locked Loop (PLL) characteristics
- 36.3.14.6 External clock characteristics
- 36.3.14.7 External 16MHz crystal oscillator and XOSC characteristic
- 36.3.14.8 External 32.768kHz crystal oscillator and TOSC characteristics
- 36.3.15 SPI Characteristics
- 36.3.16 Two-Wire Interface Characteristics
- 36.4 ATxmega128A4U
- 36.4.1 Absolute Maximum Ratings
- 36.4.2 General Operating Ratings
- 36.4.3 Current consumption
- 36.4.4 Wake-up time from sleep modes
- 36.4.5 I/O Pin Characteristics
- 36.4.6 ADC characteristics
- 36.4.7 DAC Characteristics
- 36.4.8 Analog Comparator Characteristics
- 36.4.9 Bandgap and Internal 1.0V Reference Characteristics
- 36.4.10 Brownout Detection Characteristics
- 36.4.11 External Reset Characteristics
- 36.4.12 Power-on Reset Characteristics
- 36.4.13 Flash and EEPROM Memory Characteristics
- 36.4.14 Clock and Oscillator Characteristics
- 36.4.14.1 Calibrated 32.768kHz Internal Oscillator characteristics
- 36.4.14.2 Calibrated 2MHz RC Internal Oscillator characteristics
- 36.4.14.3 Calibrated and tunable 32MHz internal oscillator characteristics
- 36.4.14.4 32kHz Internal ULP Oscillator characteristics
- 36.4.14.5 Internal Phase Locked Loop (PLL) characteristics
- 36.4.14.6 External clock characteristics
- 36.4.14.7 External 16MHz crystal oscillator and XOSC characteristic
- 36.4.14.8 External 32.768kHz crystal oscillator and TOSC characteristics
- 36.4.15 SPI Characteristics
- 36.4.16 Two-Wire Interface Characteristics
- 36.1 ATxmega16A4U
- 37. Typical Characteristics
- 37.1 ATxmega16A4U
- 37.1.1 Current consumption
- 37.1.2 I/O Pin Characteristics
- 37.1.3 ADC Characteristics
- 37.1.4 DAC Characteristics
- 37.1.5 Analog Comparator Characteristics
- 37.1.6 Internal 1.0V reference Characteristics
- 37.1.7 BOD Characteristics
- 37.1.8 External Reset Characteristics
- 37.1.9 Power-on Reset Characteristics
- 37.1.10 Oscillator Characteristics
- 37.1.11 Two-Wire Interface characteristics
- 37.1.12 PDI characteristics
- 37.2 ATxmega32A4U
- 37.2.1 Current consumption
- 37.2.2 I/O Pin Characteristics
- 37.2.3 ADC Characteristics
- 37.2.4 DAC Characteristics
- 37.2.5 Analog Comparator Characteristics
- 37.2.6 Internal 1.0V reference Characteristics
- 37.2.7 BOD Characteristics
- 37.2.8 External Reset Characteristics
- 37.2.9 Power-on Reset Characteristics
- 37.2.10 Oscillator Characteristics
- 37.2.11 Two-Wire Interface characteristics
- 37.2.12 PDI characteristics
- 37.3 ATxmega64A4U
- 37.3.1 Current consumption
- 37.3.2 I/O Pin Characteristics
- 37.3.3 ADC Characteristics
- 37.3.4 DAC Characteristics
- 37.3.5 Analog Comparator Characteristics
- 37.3.6 Internal 1.0V reference Characteristics
- 37.3.7 BOD Characteristics
- 37.3.8 External Reset Characteristics
- 37.3.9 Power-on Reset Characteristics
- 37.3.10 Oscillator Characteristics
- 37.3.11 Two-Wire Interface characteristics
- 37.3.12 PDI characteristics
- 37.4 ATxmega128A4U
- 37.4.1 Current consumption
- 37.4.2 I/O Pin Characteristics
- 37.4.3 ADC Characteristics
- 37.4.4 DAC Characteristics
- 37.4.5 Analog Comparator Characteristics
- 37.4.6 Internal 1.0V reference Characteristics
- 37.4.7 BOD Characteristics
- 37.4.8 External Reset Characteristics
- 37.4.9 Power-on Reset Characteristics
- 37.4.10 Oscillator Characteristics
- 37.4.11 Two-Wire Interface characteristics
- 37.4.12 PDI characteristics
- 37.1 ATxmega16A4U
- 38. Errata
- 39. Datasheet Revision History
- Table of Contents

20
XMEGA A4U [DATASHEET]
Atmel-8387H-AVR-ATxmega16A4U-34A4U-64A4U-128A4U-Datasheet_09/2014
9. Event System
9.1 Features
z System for direct peripheral-to-peripheral communication and signaling
z Peripherals can directly send, receive, and react to peripheral events
z CPU and DMA controller independent operation
z 100% predictable signal timing
z Short and guaranteed response time
z Eight event channels for up to eight different and parallel signal routing configurations
z Events can be sent and/or used by most peripherals, clock system, and software
z Additional functions include
z Quadrature decoders
z Digital filtering of I/O pin state
z Works in active mode and idle sleep mode
9.2 Overview
The event system enables direct peripheral-to-peripheral communication and signaling. It allows a change in one
peripheral’s state to automatically trigger actions in other peripherals. It is designed to provide a predictable system
for short and predictable response times between peripherals. It allows for autonomous peripheral control and
interaction without the use of interrupts, CPU, or DMA controller resources, and is thus a powerful tool for reducing the
complexity, size and execution time of application code. It also allows for synchronized timing of actions in several
peripheral modules.
A change in a peripheral’s state is referred to as an event, and usually corresponds to the peripheral’s interrupt
conditions. Events can be directly passed to other peripherals using a dedicated routing network called the event
routing network. How events are routed and used by the peripherals is configured in software.
Figure 9-1 on page 20 shows a basic diagram of all connected peripherals. The event system can directly connect
together analog and digital converters, analog comparators, I/O port pins, the real-time counter, timer/counters, IR
communication module (IRCOM), and USB interface. It can also be used to trigger DMA transactions (DMA
controller). Events can also be generated from software and the peripheral clock.
Figure 9-1. Event system overview and connected peripherals.
The event routing network consists of eight software-configurable multiplexers that control how events are routed and
used. These are called event channels, and allow for up to eight parallel event routing configurations. The maximum
routing latency is two peripheral clock cycles. The event system works in both active mode and idle sleep mode.
DAC
Timer /
Counters
USB
ADC
Real Time
Counter
Port pins
CPU /
Software
DMA
Controller
IRCOM
Event Routing Network
Event
System
Controller
clk
PER
Prescaler
AC