Datasheet

Table Of Contents
13
XMEGA A4U [DATASHEET]
Atmel-8387H-AVR-ATxmega16A4U-34A4U-64A4U-128A4U-Datasheet_09/2014
7. Memories
7.1 Features
z Flash program memory
z One linear address space
z In-system programmable
z Self-programming and boot loader support
z Application section for application code
z Application table section for application code or data storage
z Boot section for application code or boot loader code
z Separate read/write protection lock bits for all sections
z Built in fast CRC check of a selectable flash program memory section
z Data memory
z One linear address space
z Single-cycle access from CPU
z SRAM
z EEPROM
z Byte and page accessible
z Optional memory mapping for direct load and store
z I/O memory
z Configuration and status registers for all peripherals and modules
z 16 bit-accessible general purpose registers for global variables or flags
z Bus arbitration
z Deterministic priority handling between CPU, DMA controller, and other bus masters
z Separate buses for SRAM, EEPROM and I/O memory
z Simultaneous bus access for CPU and DMA controller
z Production signature row memory for factory programmed data
z ID for each microcontroller device type
z Serial number for each device
z Calibration bytes for factory calibrated peripherals
z User signature row
z One flash page in size
z Can be read and written from software
z Content is kept after chip erase
7.2 Overview
The Atmel AVR architecture has two main memory spaces, the program memory and the data memory. Executable
code can reside only in the program memory, while data can be stored in the program memory and the data memory.
The data memory includes the internal SRAM, and EEPROM for nonvolatile data storage. All memory spaces are
linear and require no memory bank switching. Nonvolatile memory (NVM) spaces can be locked for further write and
read/write operations. This prevents unrestricted access to the application software.
A separate memory section contains the fuse bytes. These are used for configuring important system functions, and
can only be written by an external programmer.
The available memory size configurations are shown in
“Ordering Information” on page 2. In addition, each device has
a Flash memory signature row for calibration data, device identification, serial number etc.