Datasheet

 2018 Microchip Technology Inc. Data Sheet Complete DS40002058A-page 53
ATxmega128A1U/ATxmega64A1U
26. AES and DES Crypto Engine
26.1 Features
 Data Encryption Standard (DES) CPU instruction
 Advanced Encryption Standard (AES) crypto module
 DES Instruction
 Encryption and decryption
 DES supported
 Encryption/decryption in 16 CPU clock cycles per 8-byte block
 AES crypto module
 Encryption and decryption
 Supports 128-bit keys
 Supports XOR data load mode to the state memory
 Encryption/decryption in 375 clock cycles per 16-byte block
26.2 Overview
The Advanced Encryption Standard (AES) and Data Encryption Standard (DES) are two commonly used standards for
cryptography. These are supported through an AES peripheral module and a DES CPU instruction, and the communication
interfaces and the CPU can use these for fast, encrypted communication and secure data storage.
DES is supported by an instruction in the AVR CPU. The 8-byte key and 8-byte data blocks must be loaded into the register
file, and then the DES instruction must be executed 16 times to encrypt/decrypt the data block.
The AES crypto module encrypts and decrypts 128-bit data blocks with the use of a 128-bit key. The key and data must be
loaded into the key and state memory in the module before encryption/decryption is started. It takes 375 peripheral clock
cycles before the encryption/decryption is done. The encrypted/encrypted data can then be read out, and an optional inter-
rupt can be generated. The AES crypto module also has DMA support with transfer triggers when encryption/decryption is
done and optional auto-start of encryption/decryption when the state memory is fully loaded.