Datasheet

2018 Microchip Technology Inc. Data Sheet Complete DS40002058A-page 3
ATxmega128A1U/ATxmega64A1U
Table of Contents
1 Ordering Information ............................................................................... 8
2 Pinout/Block Diagram .............................................................................. 9
3 Overview ................................................................................................. 11
3.1 Block Diagram ................................................................................................. 12
4 Resources ............................................................................................... 13
4.1 Recommended reading ................................................................................... 13
5 Capacitive touch sensing ...................................................................... 13
6 AVR CPU ................................................................................................. 14
6.1 Features .......................................................................................................... 14
6.2 Overview.......................................................................................................... 14
6.3 Architectural Overview..................................................................................... 14
6.4 ALU - Arithmetic Logic Unit ............................................................................. 15
6.5 Program Flow .................................................................................................. 16
6.6 Status Register ................................................................................................ 16
6.7 Stack and Stack Pointer .................................................................................. 16
6.8 Register File .................................................................................................... 16
7 Memories ................................................................................................ 17
7.1 Features .......................................................................................................... 17
7.2 Overview.......................................................................................................... 17
7.3 Flash Program Memory ................................................................................... 18
7.4 Fuses and Lock bits......................................................................................... 19
7.5 Data Memory ................................................................................................... 19
7.6 EEPROM ......................................................................................................... 20
7.7 I/O Memory...................................................................................................... 20
7.8 External Memory ............................................................................................. 20
7.9 Data Memory and Bus Arbitration ................................................................... 20
7.10 Memory Timing................................................................................................ 21
7.11 Device ID and Revision ................................................................................... 21
7.12 I/O Memory Protection..................................................................................... 21
7.13 JTAG Disable .................................................................................................. 21
7.14 Flash and EEPROM Page Size....................................................................... 21
8 DMAC – Direct Memory Access Controller .......................................... 23