Datasheet

64
ATtiny25/45/85 [DATASHEET]
2586Q–AVR–08/2013
10.4 Register Description
10.4.1 MCUCR – MCU Control Register
• Bit 6 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and PORTxn Registers
are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See “Configuring the Pin” on page 54 for more
details about this feature.
10.4.2 PORTB – Port B Data Register
10.4.3 DDRB – Port B Data Direction Register
10.4.4 PINB – Port B Input Pins Address
Bit 7 6 5 4 3 2 1 0
0x35
BODS PUD SE SM1 SM0 BODSE ISC01 ISC00 MCUCR
Read/Write R R/W R/W R/W R/W R R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x18 – – PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 PORTB
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
0x17 – – DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 DDRB
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
0x16 – – PINB5 PINB4 PINB3 PINB2 PINB1 PINB0 PINB
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value 0 0 N/A N/A N/A N/A N/A N/A