Datasheet

ATtiny25/45/85 [DATASHEET]

2586Q–AVR–08/2013

A typical and general setup for interrupt vector addresses in ATtiny25/45/85 is shown in the program example

below.

Note: See “Code Examples” on page 6.

9.2 External Interrupts

The External Interrupts are triggered by the INT0 pin or any of the PCINT[5:0] pins. Observe that, if enabled, the

interrupts will trigger even if the INT0 or PCINT[5:0] pins are configured as outputs. This feature provides a way of

generating a software interrupt. Pin change interrupts PCI will trigger if any enabled PCINT[5:0] pin toggles. The

PCMSK Register control which pins contribute to the pin change interrupts. Pin change interrupts on PCINT[5:0]

are detected asynchronously. This implies that these interrupts can be used for waking the part also from sleep

modes other than Idle mode.

The INT0 interrupts can be triggered by a falling or rising edge or a low level. This is set up as indicated in the

specification for the MCU Control Register – MCUCR. When the INT0 interrupt is enabled and is configured as

level triggered, the interrupt will trigger as long as the pin is held low. Note that recognition of falling or rising edge

interrupts on INT0 requires the presence of an I/O clock, described in “Clock Systems and their Distribution” on

page 23.

9.2.1 Low Level Interrupt

A low level interrupt on INT0 is detected asynchronously. This implies that this interrupt can be used for waking the

part also from sleep modes other than Idle mode. The I/O clock is halted in all sleep modes except Idle mode.

Note that if a level triggered interrupt is used for wake-up from Power-down, the required level must be held long

enough for the MCU to complete the wake-up to trigger the level interrupt. If the level disappears before the end of

Assembly Code Example

.org 0x0000 ;Set address of next statement

rjmp RESET ; Address 0x0000

rjmp INT0_ISR ; Address 0x0001

rjmp PCINT0_ISR ; Address 0x0002

rjmp TIM1_COMPA_ISR ; Address 0x0003

rjmp TIM1_OVF_ISR ; Address 0x0004

rjmp TIM0_OVF_ISR ; Address 0x0005

rjmp EE_RDY_ISR ; Address 0x0006

rjmp ANA_COMP_ISR ; Address 0x0007

rjmp ADC_ISR ; Address 0x0008

rjmp TIM1_COMPB_ISR ; Address 0x0009

rjmp TIM0_COMPA_ISR ; Address 0x000A

rjmp TIM0_COMPB_ISR ; Address 0x000B

rjmp WDT_ISR ; Address 0x000C

rjmp USI_START_ISR ; Address 0x000D

rjmp USI_OVF_ISR ; Address 0x000E

RESET: ; Main program start

<instr> ; Address 0x000F

...