Datasheet
102
ATtiny25/45/85 [DATASHEET]
2586Q–AVR–08/2013
13.3.3 TCNT1 – Timer/Counter1
This 8-bit register contains the value of Timer/Counter1.
Timer/Counter1 is realized as an up counter with read and write access. Due to synchronization of the CPU,
Timer/Counter1 data written into Timer/Counter1 is delayed by one CPU clock cycle in synchronous mode and at
most two CPU clock cycles for asynchronous mode.
13.3.4 OCR1A – Timer/Counter1 Output Compare RegisterA
The output compare register A is an 8-bit read/write register.
The Timer/Counter Output Compare Register A contains data to be continuously compared with Timer/Counter1.
Actions on compare matches are specified in TCCR1. A compare match does only occur if Timer/Counter1 counts
to the OCR1A value. A software write that sets TCNT1 and OCR1A to the same value does not generate a com-
pare match.
A compare match will set the compare interrupt flag OCF1A after a synchronization delay following the compare
event.
13.3.5 OCR1C – Timer/Counter1 Output Compare Register C
The Output Compare Register B - OCR1B from ATtiny15 is replaced with the output compare register C - OCR1C
that is an 8-bit read/write register. This register has the same function as the Output Compare Register B in
ATtiny15.
The Timer/Counter Output Compare Register C contains data to be continuously compared with Timer/Counter1.
A compare match does only occur if Timer/Counter1 counts to the OCR1C value. A software write that sets TCNT1
and OCR1C to the same value does not generate a compare match. If the CTC1 bit in TCCR1 is set, a compare
match will clear TCNT1.
13.3.6 TIMSK – Timer/Counter Interrupt Mask Register
• Bit 7 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny25/45/85 and always reads as zero.
Bit 76543210
0x2F MSB LSB TCNT1
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
Bit 76543210
0x2E MSB LSB OCR1A
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
Bit 76543210
0x2D MSB LSB OCR1C
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 1 1 1 1 1 1 1 1
Bit 7 6 5 4 3 2 1 0
0x39 –OCIE1A
OCIE1B OCIE0A OCIE0B TOIE1 TOIE0 – TIMSK
Read/Write R R/W R/W R/W R/W R/W R/W R
Initial value 0 0 0 0 0 0 0 0