Datasheet

47
8246B–AVR–09/11
ATtiny2313A/4313
• Bits 5, 2..0 – WDP3..0: Watchdog Timer Prescaler 3, 2, 1, and 0
The WDP3..0 bits determine the Watchdog Timer prescaling when the Watchdog Timer is
enabled. The different prescaling values and their corresponding Timeout Periods are shown in
Table 8-3 on page 47.
Note: 1. If selected, one of the valid settings below 0b1010 will be used.
Table 8-3. Watchdog Timer Prescale Select
WDP3 WDP2 WDP1 WDP0
Number of WDT Oscillator
Cycles
Typical Time-out at
V
CC
= 5.0V
0 0 0 0 2K cycles 16 ms
0 0 0 1 4K cycles 32 ms
0 0 1 0 8K cycles 64 ms
0 0 1 1 16K cycles 0.125 s
0 1 0 0 32K cycles 0.25 s
0 1 0 1 64K cycles 0.5 s
0 1 1 0 128K cycles 1.0 s
0 1 1 1 256K cycles 2.0 s
1 0 0 0 512K cycles 4.0 s
1 0 0 1 1024K cycles 8.0 s
1010
Reserved
(1)
1011
1100
1101
1110
1111