Datasheet

25
8246B–AVR–09/11
ATtiny2313A/4313
• Bit 0 – EERE: EEPROM Read Enable
This is the read strobe of the EEPROM. When the target address has been set up in the EEAR,
the EERE bit must be written to one to trigger the EEPROM read operation.
EEPROM read access takes one instruction, and the requested data is available immediately.
When the EEPROM is read, the CPU is halted for four cycles before the next instruction is
executed.
The user should poll the EEPE bit before starting the read operation. If a write operation is in
progress, it not possible to read the EEPROM, or to change the address register (EEAR).
5.4.4 GPIOR2 – General Purpose I/O Register 2
5.4.5 GPIOR1 – General Purpose I/O Register 1
5.4.6 GPIOR0 – General Purpose I/O Register 0
Bit 76543210
0x15 (0x35) MSB LSB GPIOR2
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
0x14 (0x34) MSB LSB GPIOR1
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
0x13 (0x33) MSB LSB GPIOR0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000