Datasheet

21
8246B–AVR–09/11
ATtiny2313A/4313
• The supply voltage is too low to maintain proper operation of an otherwise legitimate
EEPROM program sequence.
• The supply voltage is too low for the CPU and instructions may be executed incorrectly.
EEPROM data corruption is avoided by keeping the device in reset during periods of insufficient
power supply voltage. This is easily done by enabling the internal Brown-Out Detector (BOD). If
BOD detection levels are not sufficient for the design, an external reset circuit for low V
CC
can be
used.
Provided that supply voltage is sufficient, an EEPROM write operation will be completed even
when a reset occurs.
5.3.6 Program Examples
The following code examples show one assembly and one C function for erase, write, or atomic
write of the EEPROM. The examples assume that interrupts are controlled (e.g., by disabling
interrupts globally) so that no interrupts occur during execution of these functions.
Note: See “Code Examples” on page 7.
Assembly Code Example
EEPROM_write:
; Wait for completion of previous write
sbic EECR, EEPE
rjmp EEPROM_write
; Set Programming mode
ldi r16, (0<<EEPM1)|(0<<EEPM0)
out EECR, r16
; Set up address (r18:r17) in address registers
out EEARH, r18
out EEARL, r17
; Write data (r19) to data register
out EEDR, r19
; Write logical one to EEMPE
sbi EECR, EEMPE
; Start eeprom write by setting EEPE
sbi EECR, EEPE
ret