Datasheet

195
8246B–AVR–09/11
ATtiny2313A/4313
21.3.1 Pin Mapping
The pin mapping is listed in Table 21-7. Note that not all parts use the SPI pins dedicated for the
internal SPI interface.
21.3.2 Programming Algorithm
When writing serial data to the ATtiny2313A/4313, data is clocked on the rising edge of SCK.
When reading data from the ATtiny2313A/4313, data is clocked on the falling edge of SCK. See
Figure 22-6 on page 205 and Figure 22-7 on page 205 for timing details.
To program and verify the ATtiny2313A/4313 in the serial programming mode, the following
sequence is recommended (See Table 21-8, “Serial Programming Instruction Set,” on
page 196):
1. Power-up sequence: apply power between V
CC
and GND while RESET and SCK are
set to “0”
– In some systems, the programmer can not guarantee that SCK is held low during
power-up. In this case, RESET
must be given a positive pulse after SCK has been
set to '0'. The duration of the pulse must be at least t
RST
plus two CPU clock cycles.
See Table 22-3 on page 201 for definition of minimum pulse width on RESET
pin,
t
RST
2. Wait for at least 20 ms and then enable serial programming by sending the Program-
ming Enable serial instruction to the MOSI pin
3. The serial programming instructions will not work if the communication is out of syn-
chronization. When in sync, the second byte (0x53) will echo back when issuing the
third byte of the Programming Enable instruction
– Regardless if the echo is correct or not, all four bytes of the instruction must be
transmitted
– If the 0x53 did not echo back, give RESET
a positive pulse and issue a new
Programming Enable command
4. The Flash is programmed one page at a time. The memory page is loaded one byte at
a time by supplying the 4 LSB of the address and data together with the Load Program
Memory Page instruction.
– To ensure correct loading of the page, the data low byte must be loaded before data
high byte is applied for a given address
– The Program Memory Page is stored by loading the Write Program Memory Page
instruction with the 6 MSB of the address
– If polling (
RDY/BSY) is not used, the user must wait at least t
WD_FLASH
before issuing
the next page. (See Table 21-9 on page 197). Accessing the serial programming
interface before the Flash write operation completes can result in incorrect
programming.
5. The EEPROM can be programmed one byte or one page at a time.
Table 21-7. Pin Mapping Serial Programming
Symbol Pins I/O Description
MOSI PB5 I Serial Data in
MISO PB6 O Serial Data out
SCK PB7 I Serial Clock