Datasheet

8246B–AVR–09/11

ATtiny2313A/4313

5. Memories

The AVR architecture makes a distinction between program memory and data memory, locating

each memory type in a separate address space. Executable code is located in non-volatile pro-

gram memory (Flash), whereas data can be placed in either volatile (SRAM) or non-volatile

memory (EEPROM). See Figure 5-1, below.

Figure 5-1. Memory Overview.

All memory spaces are linear and regular.

5.1 Program Memory (Flash)

ATtiny2313A/4313 contains 2/4K byte of on-chip, in-system reprogrammable Flash memory for

program storage. Flash memories are non-volatile, i.e. they retain stored information even when

not powered.

Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as 1024/2048 x 16 bits.

The Program Counter (PC) is 10/11 bits wide, thus capable of addressing all 1024/2048 loca-

tions of program memory, as illustrated in Table 5-1, below.

Constant tables can be allocated within the entire address space of program memory. See

instructions LPM (Load Program Memory), and SPM (Store Program Memory) in “Instruction Set

Summary” on page 257. Flash program memory can also be programmed from an external

device, as described in “External Programming” on page 184.

Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-

ing” on page 12.

The Flash memory has a minimum endurance of 10,000 write/erase cycles.

GENERAL PURPOSE

I/O REGISTER FILE

EXTENDED

I/O REGISTER FILE

DATA MEMORY

PROGRAM MEMORY

FLASH SRAM EEPROM

Table 5-1. Size of Program Memory (Flash).

Device Flash Size Address Range

ATtiny2313A

2KB 1024 words

0x0000 – 0x03FF

ATtiny4313 4KB 2048 words

0x0000 – 0x07FF