Datasheet
2018 Microchip Technology Inc. Data Sheet Complete DS40002060A-page 80
ATtiny4/5/9/10
the 16-bit register in the same clock cycle. When the low byte of a 16-bit register is read by the CPU, the high byte of the
16-bit register is copied into the temporary register in the same clock cycle as the low byte is read.
Not all 16-bit accesses uses the temporary register for the high byte. Reading the OCR0A/B 16-bit registers does not
involve using the temporary register.
To do a 16-bit write, the high byte must be written before the low byte. For a 16-bit read, the low byte must be read before
the high byte.
The following code example shows how to access the 16-bit timer registers assuming that no interrupts updates the tempo-
rary register. The same principle can be used directly for accessing the OCR0A/B and ICR0 Registers.
Note: See “Code Examples” on page 15.
The code example returns the TCNT0 value in the r17:r16 register pair.
It is important to notice that accessing 16-bit registers are atomic operations. If an interrupt occurs between the two instruc-
tions accessing the 16-bit register, and the interrupt code updates the temporary register by accessing the same or any
other of the 16-bit timer registers, then the result of the access outside the interrupt will be corrupted. Therefore, when both
the main code and the interrupt code update the temporary register, the main code must disable the interrupts during the
16-bit access.
The following code example shows how to do an atomic read of the TCNT0 Register contents. Reading any of the OCR0A/
B or ICR0 Registers can be done by using the same principle.
Note: See “Code Examples” on page 15.
Assembly Code Example
...
; Set TCNT0 to 0x01FF
ldi r17,0x01
ldi r16,0xFF
out TCNT0H,r17
out TCNT0L,r16
; Read TCNT0 into r17:r16
in r16,TCNT0L
in r17,TCNT0H
...
Assembly Code Example
TIM16_ReadTCNT0:
; Save global interrupt flag
in r18,SREG
; Disable interrupts
cli
; Read TCNT0 into r17:r16
in r16,TCNT0L
in r17,TCNT0H
; Restore global interrupt flag
out SREG,r18
ret