Datasheet

 2018 Microchip Technology Inc. Data Sheet Complete DS40002060A-page 38
ATtiny4/5/9/10
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the Power-on Reset threshold
voltage invokes the delay counter, which determines how long the device is kept in reset after V
CC
rise. The reset signal is
activated again, without any delay, when V
CC
decreases below the detection level.
Figure 9-2. MCU Start-up, RESET
Tied to V
CC
Figure 9-3. MCU Start-up, RESET Extended Externally
9.2.2 V
CC
Level Monitoring
ATtiny4/5/9/10 have a V
CC
Level Monitoring (VLM) circuit that compares the voltage level at the V
CC
pin against fixed trig-
ger levels. The trigger levels are set with VLM2:0 bits, see “VLMCSR – VCC Level Monitoring Control and Status register”
on page 43.
The VLM circuit provides a status flag, VLMF, that indicates if voltage on the V
CC
pin is below the selected trigger level.
The flag can be read from VLMCSR, but it is also possible to have an interrupt generated when the VLMF status flag is set.
This interrupt is enabled by the VLMIE bit in the VLMCSR register. The flag can be cleared by changing the trigger level or
by writing it to zero. The flag is automatically cleared when the voltage at V
CC
rises back above the selected trigger level.
The VLM can also be used to improve reset characteristics at falling supply. Without VLM, the Power-On Reset (POR)
does not activate before supply voltage has dropped to a level where the MCU is not necessarily functional any more. With
VLM, it is possible to generate a reset earlier.
When active, the VLM circuit consumes some power, as illustrated in Figure 18-48 on page 154. To save power the VLM
circuit can be turned off completely, or it can be switched on and off at regular intervals. However, detection takes some
time and it is therefore recommended to leave the circuitry on long enough for signals to settle. See “VCC Level Monitor” on
page 127.
V
TIME-OUT
RESET
RESET
TOUT
INTERNAL
t
V
POT
V
RST
CC
V
TIME-OUT
TOUT
TOUT
INTERNAL
CC
t
V
POT
V
RST
> t
RESET
RESET