Datasheet

Figure 41-9. Programmable Delays
DLYBCS DLYBS DLYBCT DLYBCT
Chip Select 1
Chip Select 2
SPCK
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58. Electrical Characteristics for SAM V70/V71
41.7.3.5 Peripheral Selection
The serial peripherals are selected through the assertion of the NPCS0 to NPCS3 signals. By default, all NPCS
signals are high before and after each transfer
.
• Fixed Peripheral Select Mode: SPI exchanges data with only one peripheral.
Fixed Peripheral Select mode is enabled by clearing SPI_MR.PS. In this case, the current peripheral is defined
by SPI_MR.PCS. SPI_TDR.PCS has no effect.
• Variable Peripheral Select Mode: Data can be exchanged with more than one peripheral without having to
reprogram SPI_MR.PCS.
Variable Peripheral Select mode is enabled by setting SPI_MR.PS. SPI_TDR.PCS is used to select the current
peripheral. This means that the peripheral selection can be defined for each new data. The value must be
written in a single access to SPI_TDR in the following format:
[xxxxxxx(7-bit) + LASTXFER(1-bit)
(1)
+ xxxx(4-bit) + PCS (4-bit) + TD (8- to 16-bit data)]
with LASTXFER at 0 or 1 depending on the CSAAT bit, and PCS equal to the chip select to assert, as defined in
section SPI Transmit Data Register.
Note:
1. Optional
For details on CSAAT, LASTXFER and CSNAAT, see section Peripheral Deselection with another DMA.
If LASTXFER is used, the command must be issued after writing the last character. Instead of LASTXFER, the
user can use the SPIDIS command. After the end of the DMA transfer, it is necessary to wait for the TXEMPTY
flag and then write SPIDIS into the SPI Control Register (SPI_CR). This does not change the configuration
register values). The NPCS is disabled after the last character transfer. Then, another DMA transfer can be
started if SPI_CR.SPIEN has previously been written.
41.7.3.6 SPI Direct Access Memory Controller (DMAC)
In both Fixed and Variable modes, the Direct Memory Access Controller (DMAC) can be used to reduce processor
overhead.
The fixed peripheral selection allows buf
fer transfers with a single peripheral. Using the DMAC is an optimal means,
as the size of the data transfer between the memory and the SPI is either 8 bits or 16 bits. However, if the peripheral
selection is modified, SPI_MR must be reprogrammed.
The variable peripheral selection allows buffer transfers with multiple peripherals without reprogramming SPI_MR.
Data written in SPI_TDR is 32 bits wide and defines the real data to be transmitted and the destination peripheral.
Using the DMAC in this mode requires 32-bit wide buffers, with the data in the LSBs and the PCS and LASTXFER
fields in the MSBs. However, the SPI still controls the number of bits (8 to 16) to be transferred through MISO and
MOSI lines with the chip select configuration registers. This is not the optimal means in terms of memory size for the
buffers, but it provides a very effective means to exchange data with several peripherals without any intervention of
the processor.
SAM E70/S70/V70/V71 Family
Serial Peripheral Interface (SPI)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 982