Datasheet

41.3 Block Diagram
Figure 41-1. Block Diagram
DMA
SPI
Peripheral bridge
PMC
Peripheral
clock
Bus clock
AHB Matrix
Trigger
events
41.4 Application Block Diagram
Figure 41-2. Application Block Diagram: Single Master/Multiple Slave Implementation
SPI Master
SPCK
MISO
MOSI
NPCS0
NPCS1
NPCS2
SPCK
MISO
MOSI
NSS
Slave 0
SPCK
MISO
MOSI
NSS
Slave 1
SPCK
MISO
MOSI
NSS
Slave 2
NC
NPCS3
SAM E70/S70/V70/V71 Family
Serial Peripheral Interface (SPI)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 974