Datasheet

Bit 11 – RDPROOF Read Proof Enable
Enabling Read Proof allows to stop the HSMCI Clock during read access if the internal FIFO is full. This will
guarantee data integrity
, not bandwidth.
Value Description
0
Disables Read Proof.
1
Enables Read Proof.
Bits 10:8 – PWSDIV[2:0] Power Saving Divider
High Speed MultiMedia Card Interface clock is divided by 2
(PWSDIV)
+ 1 when entering Power Saving Mode.
WARNING
This value must be different from 0 before enabling the Power Save Mode in the HSMCI_CR (PWSEN bit).
Bits 7:0 – CLKDIV[7:0] Clock Divider
High Speed MultiMedia Card Interface clock (MCCK or HSMCI_CK) is Master Clock (MCK) divided by 2 × CLKDIV +
CLKODD + 2.
SAM E70/S70/V70/V71 Family
High-Speed Multimedia Card Interface (HSMCI)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 947